Lines Matching full:rctl
51 rctl: reset-controller { label
52 compatible = "gd,gd32-rctl";
77 resets = <&rctl GD32_RESET_USART0>;
86 resets = <&rctl GD32_RESET_USART1>;
95 resets = <&rctl GD32_RESET_USART2>;
104 resets = <&rctl GD32_RESET_UART3>;
113 resets = <&rctl GD32_RESET_UART4>;
122 resets = <&rctl GD32_RESET_USART5>;
131 resets = <&rctl GD32_RESET_UART6>;
140 resets = <&rctl GD32_RESET_UART7>;
148 resets = <&rctl GD32_RESET_DAC>;
163 resets = <&rctl GD32_RESET_I2C0>;
176 resets = <&rctl GD32_RESET_I2C1>;
189 resets = <&rctl GD32_RESET_I2C2>;
198 resets = <&rctl GD32_RESET_SPI0>;
209 resets = <&rctl GD32_RESET_SPI1>;
220 resets = <&rctl GD32_RESET_SPI2>;
231 resets = <&rctl GD32_RESET_ADC0>;
242 resets = <&rctl GD32_RESET_ADC1>;
253 resets = <&rctl GD32_RESET_ADC2>;
288 resets = <&rctl GD32_RESET_WWDGT>;
306 resets = <&rctl GD32_RESET_GPIOA>;
316 resets = <&rctl GD32_RESET_GPIOB>;
326 resets = <&rctl GD32_RESET_GPIOC>;
336 resets = <&rctl GD32_RESET_GPIOD>;
346 resets = <&rctl GD32_RESET_GPIOE>;
356 resets = <&rctl GD32_RESET_GPIOF>;
366 resets = <&rctl GD32_RESET_GPIOG>;
376 resets = <&rctl GD32_RESET_GPIOH>;
386 resets = <&rctl GD32_RESET_GPIOI>;
397 resets = <&rctl GD32_RESET_TIMER0>;
415 resets = <&rctl GD32_RESET_TIMER1>;
433 resets = <&rctl GD32_RESET_TIMER2>;
450 resets = <&rctl GD32_RESET_TIMER3>;
467 resets = <&rctl GD32_RESET_TIMER4>;
485 resets = <&rctl GD32_RESET_TIMER5>;
496 resets = <&rctl GD32_RESET_TIMER6>;
507 resets = <&rctl GD32_RESET_TIMER7>;
525 resets = <&rctl GD32_RESET_TIMER8>;
542 resets = <&rctl GD32_RESET_TIMER9>;
559 resets = <&rctl GD32_RESET_TIMER10>;
576 resets = <&rctl GD32_RESET_TIMER11>;
593 resets = <&rctl GD32_RESET_TIMER12>;
610 resets = <&rctl GD32_RESET_TIMER13>;
627 resets = <&rctl GD32_RESET_DMA0>;
640 resets = <&rctl GD32_RESET_DMA1>;