Lines Matching full:rctl
52 rctl: reset-controller { label
53 compatible = "gd,gd32-rctl";
80 resets = <&rctl GD32_RESET_USART0>;
89 resets = <&rctl GD32_RESET_USART1>;
98 resets = <&rctl GD32_RESET_USART2>;
106 resets = <&rctl GD32_RESET_DAC>;
121 resets = <&rctl GD32_RESET_I2C0>;
134 resets = <&rctl GD32_RESET_I2C1>;
143 resets = <&rctl GD32_RESET_SPI0>;
154 resets = <&rctl GD32_RESET_SPI1>;
165 resets = <&rctl GD32_RESET_ADC0>;
176 resets = <&rctl GD32_RESET_ADC1>;
211 resets = <&rctl GD32_RESET_WWDGT>;
229 resets = <&rctl GD32_RESET_GPIOA>;
239 resets = <&rctl GD32_RESET_GPIOB>;
249 resets = <&rctl GD32_RESET_GPIOC>;
259 resets = <&rctl GD32_RESET_GPIOD>;
269 resets = <&rctl GD32_RESET_GPIOE>;
279 resets = <&rctl GD32_RESET_GPIOF>;
290 resets = <&rctl GD32_RESET_TIMER0>;
308 resets = <&rctl GD32_RESET_TIMER1>;
326 resets = <&rctl GD32_RESET_TIMER5>;
337 resets = <&rctl GD32_RESET_TIMER6>;
348 resets = <&rctl GD32_RESET_TIMER7>;
366 resets = <&rctl GD32_RESET_TIMER19>;
383 resets = <&rctl GD32_RESET_TIMER20>;