2  * Copyright 2022-2023 Daniel DeGrasse <daniel@degrasse.com>
4  * SPDX-License-Identifier: Apache-2.0
33 #define CONF_REG_SYNC_SHIFT	0x6 /* Sync mode shift */
34 #define CONF_REG_SYNC_MASK	0xC /* Sync mode mask */
52 	uint8_t sync;  member
70 	const struct is31fl3733_config *config = dev->config;  in is31fl3733_select_page()
71 	struct is31fl3733_data *data = dev->data;  in is31fl3733_select_page()
74 	if (data->selected_page == page) {  in is31fl3733_select_page()
80 	ret = i2c_reg_write_byte_dt(&config->bus, CMD_LOCK_REG, CMD_LOCK_UNLOCK);  in is31fl3733_select_page()
87 	ret = i2c_reg_write_byte_dt(&config->bus, CMD_SEL_REG, page);  in is31fl3733_select_page()
92 	data->selected_page = page;  in is31fl3733_select_page()
99 	const struct is31fl3733_config *config = dev->config;  in is31fl3733_led_set_brightness()
104 		return -EINVAL;  in is31fl3733_led_set_brightness()
107 	/* Configure PWM mode */  in is31fl3733_led_set_brightness()
113 	return i2c_reg_write_byte_dt(&config->bus, led, led_brightness);  in is31fl3733_led_set_brightness()
129 	const struct is31fl3733_config *config = dev->config;  in is31fl3733_led_write_channels()
130 	struct is31fl3733_data *data = dev->data;  in is31fl3733_led_write_channels()
135 		return -EINVAL;  in is31fl3733_led_write_channels()
137 	pwm_start = data->scratch_buf + start_channel;  in is31fl3733_led_write_channels()
149 	return i2c_write_dt(&config->bus, pwm_start, num_channels + 1);  in is31fl3733_led_write_channels()
154 	const struct is31fl3733_config *config = dev->config;  in is31fl3733_init()
155 	struct is31fl3733_data *data = dev->data;  in is31fl3733_init()
159 	if (!i2c_is_ready_dt(&config->bus)) {  in is31fl3733_init()
161 		return -ENODEV;  in is31fl3733_init()
163 	if (config->sdb.port != NULL) {  in is31fl3733_init()
164 		if (!gpio_is_ready_dt(&config->sdb)) {  in is31fl3733_init()
166 			return -ENODEV;  in is31fl3733_init()
169 		ret = gpio_pin_configure_dt(&config->sdb, GPIO_OUTPUT_ACTIVE);  in is31fl3733_init()
183 	ret = i2c_reg_read_byte_dt(&config->bus, RESET_REG, &dummy);  in is31fl3733_init()
194 	ret = i2c_reg_write_byte_dt(&config->bus, GLOBAL_CURRENT_CTRL_REG,  in is31fl3733_init()
195 				config->current_limit);  in is31fl3733_init()
200 	 * blanking. We also set the LED controller sync mode here.  in is31fl3733_init()
202 	data->conf_reg = (config->sync << CONF_REG_SYNC_SHIFT) | CONF_REG_SSD_MASK;  in is31fl3733_init()
203 	ret = i2c_reg_write_byte_dt(&config->bus, CONF_REG, data->conf_reg);  in is31fl3733_init()
209 	data->scratch_buf[0] = 0x0;  in is31fl3733_init()
210 	memset(data->scratch_buf + 1, 0xFF, (IS31FL3733_MAX_LED / 8));  in is31fl3733_init()
216 	return i2c_write_dt(&config->bus, data->scratch_buf,  in is31fl3733_init()
226  * flicker-free display updates, or power saving.
234 	const struct is31fl3733_config *config = dev->config;  in is31fl3733_blank()
235 	struct is31fl3733_data *data = dev->data;  in is31fl3733_blank()
244 		data->conf_reg &= ~CONF_REG_SSD_MASK;  in is31fl3733_blank()
246 		data->conf_reg |= CONF_REG_SSD_MASK;  in is31fl3733_blank()
249 	return i2c_reg_write_byte_dt(&config->bus, CONF_REG, data->conf_reg);  in is31fl3733_blank()
256  * from per-led brightness, and applies to all LEDs.
266 	const struct is31fl3733_config *config = dev->config;  in is31fl3733_current_limit()
275 	return i2c_reg_write_byte_dt(&config->bus, GLOBAL_CURRENT_CTRL_REG, limit);  in is31fl3733_current_limit()
290 		.sync = DT_INST_ENUM_IDX(n, sync_mode),						   \