Lines Matching full:irq

45  * The lower 32 bit value of the redirection table entries for IRQ 0
46 * to 15 are edge triggered positive high, and for IRQ 16 to 23 are level
100 #define BIT_POS_FOR_IRQ_OPTION(irq, option) ((irq) * BITS_PER_IRQ + (option)) argument
102 /* Allocating up to 256 irq bits bufffer for RTEs, RTEs are dynamically found
113 static void ioApicRedSetHi(unsigned int irq, uint32_t upper32);
114 static void ioApicRedSetLo(unsigned int irq, uint32_t lower32);
115 static uint32_t ioApicRedGetLo(unsigned int irq);
116 static void IoApicRedUpdateLo(unsigned int irq, uint32_t value,
152 * interrupt controller driver due to the IRQ virtualization imposed by
200 * @param irq IRQ number to enable
203 void z_ioapic_irq_enable(unsigned int irq) in z_ioapic_irq_enable() argument
205 IoApicRedUpdateLo(irq, 0, IOAPIC_INT_MASK); in z_ioapic_irq_enable()
212 * @param irq IRQ number to disable
215 void z_ioapic_irq_disable(unsigned int irq) in z_ioapic_irq_disable() argument
217 IoApicRedUpdateLo(irq, IOAPIC_INT_MASK, IOAPIC_INT_MASK); in z_ioapic_irq_disable()
224 void store_flags(unsigned int irq, uint32_t flags) in store_flags() argument
229 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_HI_LO)); in store_flags()
234 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_LVL_EDGE)); in store_flags()
239 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_ENBL_DSBL)); in store_flags()
248 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_DELIV_MODE)); in store_flags()
253 uint32_t restore_flags(unsigned int irq) in restore_flags() argument
258 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_HI_LO))) { in restore_flags()
263 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_LVL_EDGE))) { in restore_flags()
268 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_ENBL_DSBL))) { in restore_flags()
273 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_DELIV_MODE))) { in restore_flags()
284 int irq; in ioapic_suspend() local
289 for (irq = 0; irq < ioapic_rtes; irq++) { in ioapic_suspend()
292 * IRQ lines, so as to limit ourselves to saving the in ioapic_suspend()
295 if (_irq_to_interrupt_vector[irq]) { in ioapic_suspend()
296 rte_lo = ioApicRedGetLo(irq); in ioapic_suspend()
297 store_flags(irq, rte_lo); in ioapic_suspend()
306 int irq; in ioapic_resume_from_suspend() local
312 for (irq = 0; irq < ioapic_rtes; irq++) { in ioapic_resume_from_suspend()
313 if (_irq_to_interrupt_vector[irq]) { in ioapic_resume_from_suspend()
315 flags = restore_flags(irq); in ioapic_resume_from_suspend()
319 rteValue = (_irq_to_interrupt_vector[irq] & in ioapic_resume_from_suspend()
327 ioApicRedSetHi(irq, DEFAULT_RTE_DEST); in ioapic_resume_from_suspend()
328 ioApicRedSetLo(irq, rteValue); in ioapic_resume_from_suspend()
362 * This routine sets up the redirection table entry for the specified IRQ
363 * @param irq Virtualized IRQ
368 void z_ioapic_irq_set(unsigned int irq, unsigned int vector, uint32_t flags) argument
381 irte_idx = vtd_get_irte_by_irq(vtd, irq);
388 ioApicRedSetHi(irq, rteValue);
398 ioApicRedSetLo(irq, rteValue);
411 ioApicRedSetHi(irq, DEFAULT_RTE_DEST);
412 ioApicRedSetLo(irq, rteValue);
417 * @brief Program interrupt vector for specified irq
420 * Table for specified irq number
422 * @param irq Interrupt number
426 void z_ioapic_int_vec_set(unsigned int irq, unsigned int vector) argument
428 IoApicRedUpdateLo(irq, vector, IOAPIC_VEC_MASK);
485 * @param irq INTIN number
489 static uint32_t ioApicRedGetLo(unsigned int irq) argument
491 int32_t offset = IOAPIC_REDTBL + (irq << 1); /* register offset */
501 * @param irq INTIN number
505 static void ioApicRedSetLo(unsigned int irq, uint32_t lower32) argument
507 int32_t offset = IOAPIC_REDTBL + (irq << 1); /* register offset */
517 * @param irq INTIN number
521 static void ioApicRedSetHi(unsigned int irq, uint32_t upper32) argument
523 int32_t offset = IOAPIC_REDTBL + (irq << 1) + 1; /* register offset */
534 * @param irq INTIN number
539 static void IoApicRedUpdateLo(unsigned int irq, argument
543 ioApicRedSetLo(irq, (ioApicRedGetLo(irq) & ~mask) | (value & mask));