6  * SPDX-License-Identifier: Apache-2.0
77 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_configure()
78 	GPIO_Type *gpio_base = config->gpio_base;  in gpio_rv32m1_configure()
79 	PORT_Type *port_base = config->port_base;  in gpio_rv32m1_configure()
80 	uint32_t mask = 0U;  in gpio_rv32m1_configure()  local
84 	if (pin >= ARRAY_SIZE(port_base->PCR)) {  in gpio_rv32m1_configure()
85 		return -EINVAL;  in gpio_rv32m1_configure()
90 		return -EINVAL;  in gpio_rv32m1_configure()
94 		return -ENOTSUP;  in gpio_rv32m1_configure()
98 		return -ENOTSUP;  in gpio_rv32m1_configure()
103 	    ((config->flags & GPIO_INT_ENABLE) == 0U)) {  in gpio_rv32m1_configure()
104 		return -ENOTSUP;  in gpio_rv32m1_configure()
111 	 * 0 - pin is input, 1 - pin is output  in gpio_rv32m1_configure()
116 		gpio_base->PDDR &= ~BIT(pin);  in gpio_rv32m1_configure()
120 			gpio_base->PSOR = BIT(pin);  in gpio_rv32m1_configure()
122 			gpio_base->PCOR = BIT(pin);  in gpio_rv32m1_configure()
124 		gpio_base->PDDR |= BIT(pin);  in gpio_rv32m1_configure()
127 		return -ENOTSUP;  in gpio_rv32m1_configure()
131 	mask |= PORT_PCR_MUX_MASK;  in gpio_rv32m1_configure()
134 	/* Now do the PORT module. Figure out the pullup/pulldown  in gpio_rv32m1_configure()
137 	mask |= PORT_PCR_PE_MASK | PORT_PCR_PS_MASK;  in gpio_rv32m1_configure()
140 		/* Enable the pull and select the pullup resistor. */  in gpio_rv32m1_configure()
145 		 * the pullup resistor.  in gpio_rv32m1_configure()
153 	mask |= PORT_PCR_IRQC_MASK;  in gpio_rv32m1_configure()
156 	port_base->PCR[pin] = (port_base->PCR[pin] & ~mask) | pcr;  in gpio_rv32m1_configure()
163 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_port_get_raw()
164 	GPIO_Type *gpio_base = config->gpio_base;  in gpio_rv32m1_port_get_raw()
166 	*value = gpio_base->PDIR;  in gpio_rv32m1_port_get_raw()
172 					   uint32_t mask,  in gpio_rv32m1_port_set_masked_raw()  argument
175 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_port_set_masked_raw()
176 	GPIO_Type *gpio_base = config->gpio_base;  in gpio_rv32m1_port_set_masked_raw()
178 	gpio_base->PDOR = (gpio_base->PDOR & ~mask) | (mask & value);  in gpio_rv32m1_port_set_masked_raw()
184 					 uint32_t mask)  in gpio_rv32m1_port_set_bits_raw()  argument
186 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_port_set_bits_raw()
187 	GPIO_Type *gpio_base = config->gpio_base;  in gpio_rv32m1_port_set_bits_raw()
189 	gpio_base->PSOR = mask;  in gpio_rv32m1_port_set_bits_raw()
195 					   uint32_t mask)  in gpio_rv32m1_port_clear_bits_raw()  argument
197 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_port_clear_bits_raw()
198 	GPIO_Type *gpio_base = config->gpio_base;  in gpio_rv32m1_port_clear_bits_raw()
200 	gpio_base->PCOR = mask;  in gpio_rv32m1_port_clear_bits_raw()
206 					uint32_t mask)  in gpio_rv32m1_port_toggle_bits()  argument
208 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_port_toggle_bits()
209 	GPIO_Type *gpio_base = config->gpio_base;  in gpio_rv32m1_port_toggle_bits()
211 	gpio_base->PTOR = mask;  in gpio_rv32m1_port_toggle_bits()
221 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_pin_interrupt_configure()
222 	PORT_Type *port_base = config->port_base;  in gpio_rv32m1_pin_interrupt_configure()
225 	if (pin >= ARRAY_SIZE(port_base->PCR)) {  in gpio_rv32m1_pin_interrupt_configure()
226 		return -EINVAL;  in gpio_rv32m1_pin_interrupt_configure()
231 	    ((config->flags & GPIO_INT_ENABLE) == 0U)) {  in gpio_rv32m1_pin_interrupt_configure()
232 		return -ENOTSUP;  in gpio_rv32m1_pin_interrupt_configure()
237 	port_base->PCR[pin] = (port_base->PCR[pin] & ~PORT_PCR_IRQC_MASK) | pcr;  in gpio_rv32m1_pin_interrupt_configure()
247 	struct gpio_rv32m1_data *data = dev->data;  in gpio_rv32m1_manage_callback()
249 	gpio_manage_callback(&data->callbacks, callback, set);  in gpio_rv32m1_manage_callback()
256 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_port_isr()
257 	struct gpio_rv32m1_data *data = dev->data;  in gpio_rv32m1_port_isr()
260 	int_status = config->port_base->ISFR;  in gpio_rv32m1_port_isr()
263 	config->port_base->ISFR = int_status;  in gpio_rv32m1_port_isr()
265 	gpio_fire_callbacks(&data->callbacks, dev, int_status);  in gpio_rv32m1_port_isr()
270 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_init()
273 	if (config->clock_dev) {  in gpio_rv32m1_init()
274 		if (!device_is_ready(config->clock_dev)) {  in gpio_rv32m1_init()
275 			return -ENODEV;  in gpio_rv32m1_init()
278 		ret = clock_control_on(config->clock_dev, config->clock_subsys);  in gpio_rv32m1_init()
284 	return config->irq_config_func(dev);  in gpio_rv32m1_init()