6  * SPDX-License-Identifier: Apache-2.0
23 	mem_addr_t mram;  member
34 	const struct can_mcan_config *mcan_config = dev->config;  in can_sam0_read_reg()
35 	const struct can_sam0_config *sam_config = mcan_config->custom;  in can_sam0_read_reg()
37 	return can_mcan_sys_read_reg(sam_config->base, reg, val);  in can_sam0_read_reg()
42 	const struct can_mcan_config *mcan_config = dev->config;  in can_sam0_write_reg()
43 	const struct can_sam0_config *sam_config = mcan_config->custom;  in can_sam0_write_reg()
59 	return can_mcan_sys_write_reg(sam_config->base, reg, val);  in can_sam0_write_reg()
64 	const struct can_mcan_config *mcan_config = dev->config;  in can_sam0_read_mram()
65 	const struct can_sam0_config *sam_config = mcan_config->custom;  in can_sam0_read_mram()
67 	return can_mcan_sys_read_mram(sam_config->mram, offset, dst, len);  in can_sam0_read_mram()
73 	const struct can_mcan_config *mcan_config = dev->config;  in can_sam0_write_mram()
74 	const struct can_sam0_config *sam_config = mcan_config->custom;  in can_sam0_write_mram()
76 	return can_mcan_sys_write_mram(sam_config->mram, offset, src, len);  in can_sam0_write_mram()
81 	const struct can_mcan_config *mcan_config = dev->config;  in can_sam0_clear_mram()
82 	const struct can_sam0_config *sam_config = mcan_config->custom;  in can_sam0_clear_mram()
84 	return can_mcan_sys_clear_mram(sam_config->mram, offset, len);  in can_sam0_clear_mram()
95 	const struct can_mcan_config *mcan_cfg = dev->config;  in can_sam0_get_core_clock()
96 	const struct can_sam0_config *sam_cfg = mcan_cfg->custom;  in can_sam0_get_core_clock()
98 	*rate = SOC_ATMEL_SAM0_OSC48M_FREQ_HZ / (sam_cfg->divider);  in can_sam0_get_core_clock()
103 static void can_sam0_clock_enable(const struct can_sam0_config *cfg)  in can_sam0_clock_enable()  argument
106 	GCLK->GENCTRL[7].reg = GCLK_GENCTRL_SRC(GCLK_GENCTRL_SRC_OSC48M)  in can_sam0_clock_enable()
107 			     | GCLK_GENCTRL_DIV(cfg->divider)  in can_sam0_clock_enable()
111 	GCLK->PCHCTRL[cfg->gclk_core_id].reg = GCLK_PCHCTRL_GEN_GCLK7  in can_sam0_clock_enable()
115 	*cfg->mclk |= cfg->mclk_mask;  in can_sam0_clock_enable()
120 	const struct can_mcan_config *mcan_cfg = dev->config;  in can_sam0_init()
121 	const struct can_sam0_config *sam_cfg = mcan_cfg->custom;  in can_sam0_init()
126 	ret = pinctrl_apply_state(sam_cfg->pcfg, PINCTRL_STATE_DEFAULT);  in can_sam0_init()
132 	ret = can_mcan_configure_mram(dev, 0U, sam_cfg->mram);  in can_sam0_init()
144 	sam_cfg->config_irq();  in can_sam0_init()
199 		.mram = (mem_addr_t)POINTER_TO_UINT(&can_sam0_mram_##inst),		\