Lines Matching +full:no +full:- +full:legacy +full:- +full:irq
21 taking a ``void *mem`` pointer instead of a ``void **mem`` double-pointer.
37 * The default C library used on most targets has changed from the built-in
47 increase by 8-16 bytes.
68 * Picolibc removes the ``-ffreestanding`` compiler option. This allows
71 the Zephyr required type -- ``int main(void)``.
85 * ``zephyr,memory-region-mpu`` was renamed ``zephyr,memory-attr`` and its type
89 .. code-block:: none
91 - "RAM" -> <( DT_MEM_ARM(ATTR_MPU_RAM) )>
92 - "RAM_NOCACHE" -> <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>
93 - "FLASH" -> <( DT_MEM_ARM(ATTR_MPU_FLASH) )>
94 - "PPB" -> <( DT_MEM_ARM(ATTR_MPU_PPB) )>
95 - "IO" -> <( DT_MEM_ARM(ATTR_MPU_IO) )>
96 - "EXTMEM" -> <( DT_MEM_ARM(ATTR_MPU_EXTMEM) )>
100 This means that an extra linker stage is no longer necessary if this option is
103 * On all STM32 ADC, it is no longer possible to read sensor channels (Vref,
115 .. code-block:: devicetree
119 compatible = "zephyr,ram-disk";
120 disk-name = "RAM";
121 sector-size = <512>;
122 sector-count = <192>;
129 :dtcompatible:`zephyr,kscan-input` node.
131 * The ``zephyr,gpio-keys`` binding has been merged into
132 :dtcompatible:`gpio-keys` and the callback definition has been renamed from
154 * ``CONFIG_SSD1306_REVERSE_MODE`` is now set using the ``inversion-on``
157 * GPIO drivers not implementing IRQ related operations must now provide
160 ``-ENOSYS`` when these are not available, instead of ``-ENOTSUP``.
170 ``st,adc-clock-source`` allows choosing either synchronous or asynchronous clock source.
171 ``st,adc-prescaler`` allows setting the value of the prescaler for the chosen clock source.
177 .. code-block:: devicetree
184 * On NXP boards with LPC DMA, the DMA controller node used to have its ``dma-channels`` property
186 This did not match the zephyr dma-controller binding, so this property is now fixed and set
200 no longer fallback to the (Re-)Synchronization Jump Width (SJW) value set in the devicetree
202 ``CAN_SJW_NO_CHANGE`` (which is no longer available). The caller will therefore need to fill in
209 * The CAN ISO-TP message configuration in :c:struct:`isotp_msg_id` is changed to use the following
212 * :c:macro:`ISOTP_MSG_EXT_ADDR` to enable ISO-TP extended addressing
213 * :c:macro:`ISOTP_MSG_FIXED_ADDR` to enable ISO-TP fixed addressing
214 * :c:macro:`ISOTP_MSG_IDE` to use extended (29-bit) CAN IDs
237 this is no longer supported. As a result of this change, power management
238 hooks are no longer defined as weaks.
240 * Multiple platforms no longer support powering the system off using
279 result, MDIO controller nodes now require ``#address-cells`` and
280 ``#size-cells`` properties. Similarly, Ethernet PHY devicetree nodes and
282 ``ethernet-phy`` instead of ``phy``. Devicetrees and overlays must be updated
285 .. code-block:: devicetree
288 compatible = "mdio-controller";
289 #address-cells = <1>;
290 #size-cells = <0>;
292 ethernet-phy@0 {
293 compatible = "ethernet-phy";
305 - Replace the integer ``CONFIG_ZBUS_RUNTIME_OBSERVERS_POOL_SIZE`` with the boolean
307 - Set the HEAP size with the :kconfig:option:`CONFIG_HEAP_MEM_POOL_SIZE`.
317 SMP version 2 error code defines for in-tree modules have been updated to
320 * MCUmgr SMP version 2 error translation (to legacy MCUmgr error code) is now
330 * ARM SoC initialization routines no longer need to call `NMI_INIT()`. The
346 example :dtcompatible:`arm,gic-v2`, to the GIC node in the device tree.
350 ``nfct-pins-as-gpios`` property in devicetree. It can be set like this in the
353 .. code-block:: devicetree
356 nfct-pins-as-gpios;
361 ``gpio-as-nreset`` property in devicetree. It can be set like this in the
364 .. code-block:: devicetree
367 gpio-as-nreset;
384 initial CAN bitrate using the ``bus-speed``, ``sample-point``, ``bus-speed-data``, and
385 ``sample-point-data`` properties:
388 * ``prop-seg``
389 * ``phase-seg1``
390 * ``phase-seg1``
391 * ``sjw-data``
392 * ``prop-seg-data``
393 * ``phase-seg1-data``
394 * ``phase-seg1-data``