Lines Matching full:a1
99 * area pointed to by the current stack pointer A1. The Floating-Point
106 s32i a0, a1, ___xtensa_irq_bsa_t_fcr_OFFSET
108 s32i a0, a1, ___xtensa_irq_bsa_t_fsr_OFFSET
109 ssi f0, a1, ___xtensa_irq_bsa_t_fpu0_OFFSET
110 ssi f1, a1, ___xtensa_irq_bsa_t_fpu1_OFFSET
111 ssi f2, a1, ___xtensa_irq_bsa_t_fpu2_OFFSET
112 ssi f3, a1, ___xtensa_irq_bsa_t_fpu3_OFFSET
113 ssi f4, a1, ___xtensa_irq_bsa_t_fpu4_OFFSET
114 ssi f5, a1, ___xtensa_irq_bsa_t_fpu5_OFFSET
115 ssi f6, a1, ___xtensa_irq_bsa_t_fpu6_OFFSET
116 ssi f7, a1, ___xtensa_irq_bsa_t_fpu7_OFFSET
117 ssi f8, a1, ___xtensa_irq_bsa_t_fpu8_OFFSET
118 ssi f9, a1, ___xtensa_irq_bsa_t_fpu9_OFFSET
119 ssi f10, a1, ___xtensa_irq_bsa_t_fpu10_OFFSET
120 ssi f11, a1, ___xtensa_irq_bsa_t_fpu11_OFFSET
121 ssi f12, a1, ___xtensa_irq_bsa_t_fpu12_OFFSET
122 ssi f13, a1, ___xtensa_irq_bsa_t_fpu13_OFFSET
123 ssi f14, a1, ___xtensa_irq_bsa_t_fpu14_OFFSET
124 ssi f15, a1, ___xtensa_irq_bsa_t_fpu15_OFFSET
128 l32i.n a0, a1, ___xtensa_irq_bsa_t_fcr_OFFSET
130 l32i.n a0, a1, ___xtensa_irq_bsa_t_fsr_OFFSET
132 lsi f0, a1, ___xtensa_irq_bsa_t_fpu0_OFFSET
133 lsi f1, a1, ___xtensa_irq_bsa_t_fpu1_OFFSET
134 lsi f2, a1, ___xtensa_irq_bsa_t_fpu2_OFFSET
135 lsi f3, a1, ___xtensa_irq_bsa_t_fpu3_OFFSET
136 lsi f4, a1, ___xtensa_irq_bsa_t_fpu4_OFFSET
137 lsi f5, a1, ___xtensa_irq_bsa_t_fpu5_OFFSET
138 lsi f6, a1, ___xtensa_irq_bsa_t_fpu6_OFFSET
139 lsi f7, a1, ___xtensa_irq_bsa_t_fpu7_OFFSET
140 lsi f8, a1, ___xtensa_irq_bsa_t_fpu8_OFFSET
141 lsi f9, a1, ___xtensa_irq_bsa_t_fpu9_OFFSET
142 lsi f10, a1, ___xtensa_irq_bsa_t_fpu10_OFFSET
143 lsi f11, a1, ___xtensa_irq_bsa_t_fpu11_OFFSET
144 lsi f12, a1, ___xtensa_irq_bsa_t_fpu12_OFFSET
145 lsi f13, a1, ___xtensa_irq_bsa_t_fpu13_OFFSET
146 lsi f14, a1, ___xtensa_irq_bsa_t_fpu14_OFFSET
147 lsi f15, a1, ___xtensa_irq_bsa_t_fpu15_OFFSET
164 s32i a0, a1, ___xtensa_irq_bsa_t_sar_OFFSET
167 s32i a0, a1, ___xtensa_irq_bsa_t_lbeg_OFFSET
169 s32i a0, a1, ___xtensa_irq_bsa_t_lend_OFFSET
171 s32i a0, a1, ___xtensa_irq_bsa_t_lcount_OFFSET
174 s32i a0, a1, ___xtensa_irq_bsa_t_exccause_OFFSET
177 s32i a0, a1, ___xtensa_irq_bsa_t_scompare1_OFFSET
181 s32i a0, a1, ___xtensa_irq_bsa_t_threadptr_OFFSET
298 * interrupted stack frame, which means that the A1 register it finds
309 * were saved via external means) holds the "interrupted A1" and the
338 * interrupted/old stack) in A1, a handler function in A2, and a "new"
347 * the context save handle in A1 as it's first argument.
351 mov a10, a1 /* pass "context handle" in 2nd frame's A2 */
352 mov a3, a1 /* stash it locally in A3 too */
356 l32i a1, a1, 0
357 l32i a0, a1, ___xtensa_irq_bsa_t_a0_OFFSET
358 addi a1, a1, ___xtensa_irq_bsa_t_SIZEOF
361 mov a1, a3 /* restore original SP */
370 entry a1, 16
371 mov a1, a2
401 * by the save. Stash it into the unused "a1" slot in the
404 s32i a2, a1, ___xtensa_irq_bsa_t_scratch_OFFSET
409 l32i a2, a1, 0
454 /* A1 already contains our saved stack, and A2 our handler.
456 * "new" stack into A3. This can be either a copy of A1 or an
464 /* Use the same stack, just copy A1 to A3 after incrementing NEST */
467 mov a3, a1
494 * Remember to restore the A1 stack pointer as it existed at
498 beq a6, a1, _restore_\@
499 l32i a1, a1, 0
500 l32i a0, a1, ___xtensa_irq_bsa_t_a0_OFFSET
501 addi a1, a1, ___xtensa_irq_bsa_t_SIZEOF
508 mov a1, a6
558 mov a3, a1
574 addi a1, a1, -___xtensa_irq_bsa_t_SIZEOF
575 s32i a0, a1, ___xtensa_irq_bsa_t_a0_OFFSET
576 s32i a2, a1, ___xtensa_irq_bsa_t_a2_OFFSET
577 s32i a3, a1, ___xtensa_irq_bsa_t_a3_OFFSET
599 s32i a0, a1, ___xtensa_irq_bsa_t_ps_OFFSET
602 s32i a0, a1, ___xtensa_irq_bsa_t_ps_OFFSET
606 s32i a0, a1, ___xtensa_irq_bsa_t_pc_OFFSET