Lines Matching +full:gpio +full:- +full:controller

4  * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/gpio/gpio.h>
11 	#address-cells = <1>;
12 	#size-cells = <1>;
15 		#address-cells = <1>;
16 		#size-cells = <0>;
18 			clock-frequency = <0>;
23 			hlic0: interrupt-controller {
24 				compatible = "riscv,cpu-intc";
25 				#address-cells = <0>;
26 				#interrupt-cells = <1>;
27 				interrupt-controller;
32 			clock-frequency = <0>;
37 			hlic1: interrupt-controller {
38 				compatible = "riscv,cpu-intc";
39 				#address-cells = <0>;
40 				#interrupt-cells = <1>;
41 				interrupt-controller;
46 			clock-frequency = <0>;
51 			hlic2: interrupt-controller {
52 				compatible = "riscv,cpu-intc";
53 				#address-cells = <0>;
54 				#interrupt-cells = <1>;
55 				interrupt-controller;
60 			clock-frequency = <0>;
65 			hlic3: interrupt-controller {
66 				compatible = "riscv,cpu-intc";
67 				#address-cells = <0>;
68 				#interrupt-cells = <1>;
69 				interrupt-controller;
74 			clock-frequency = <0>;
79 			hlic4: interrupt-controller {
80 				compatible = "riscv,cpu-intc";
81 				#address-cells = <0>;
82 				#interrupt-cells = <1>;
83 				interrupt-controller;
89 		#address-cells = <1>;
90 		#size-cells = <1>;
91 		compatible = "simple-bus";
95 			compatible = "mmio-sram";
100 			compatible = "mmio-sram";
106 			interrupts-extended = <&hlic0 3 &hlic0 7
111 			interrupt-names = "soft0", "timer0", "soft1", "timer1",
117 		plic: interrupt-controller@c000000 {
118 			compatible = "sifive,plic-1.0.0";
119 			#interrupt-cells = <2>;
120 			#address-cells = <1>;
121 			interrupt-controller;
122 			interrupts-extended = <&hlic0 11
127 			reg-names = "prio", "irq_en", "reg";
128 			riscv,max-priority = <7>;
135 			clock-frequency = <150000000>;
136 			current-speed = <115200>;
137 			interrupt-parent = <&plic>;
139 			reg-shift = <2>;
146 			clock-frequency = <150000000>;
147 			current-speed = <115200>;
148 			interrupt-parent = <&plic>;
150 			reg-shift = <2>;
157 			clock-frequency = <150000000>;
158 			current-speed = <115200>;
159 			interrupt-parent = <&plic>;
161 			reg-shift = <2>;
168 			clock-frequency = <150000000>;
169 			current-speed = <115200>;
170 			interrupt-parent = <&plic>;
172 			reg-shift = <2>;
179 			clock-frequency = <150000000>;
180 			current-speed = <115200>;
181 			interrupt-parent = <&plic>;
183 			reg-shift = <2>;
188 			compatible = "microchip,mpfs-qspi";
189 			#address-cells = <1>;
190 			#size-cells = <0>;
192 			interrupt-parent = <&plic>;
195 			clock-frequency = <150000000>;
198 		gpio0: gpio@20120000 {
199 			compatible = "microchip,mpfs-gpio";
201 			interrupt-parent = <&plic>;
203 			interrupt-controller;
204 			#interrupt-cells = <1>;
205 			gpio-controller;
206 			#gpio-cells = <2>;
211 		gpio1: gpio@20121000 {
212 			compatible = "microchip,mpfs-gpio";
214 			interrupt-parent = <&plic>;
216 			interrupt-controller;
217 			#interrupt-cells = <1>;
218 			gpio-controller;
219 			#gpio-cells = <2>;
224 		gpio2: gpio@20122000 {
225 			compatible = "microchip,mpfs-gpio";
227 			interrupt-parent = <&plic>;
229 			interrupt-controller;
230 			#interrupt-cells = <1>;
231 			gpio-controller;
232 			#gpio-cells = <2>;