Lines Matching defs:value
79 #define ADS114S0X_REGISTER_GET_VALUE(value, pos, length) \ argument
81 #define ADS114S0X_REGISTER_SET_VALUE(target, value, pos, length) \ argument
87 #define ADS114S0X_REGISTER_ID_DEV_ID_GET(value) \ argument
90 #define ADS114S0X_REGISTER_ID_DEV_ID_SET(target, value) \ argument
95 #define ADS114S0X_REGISTER_STATUS_FL_POR_GET(value) \ argument
98 #define ADS114S0X_REGISTER_STATUS_FL_POR_SET(target, value) \ argument
103 #define ADS114S0X_REGISTER_STATUS_NOT_RDY_GET(value) \ argument
106 #define ADS114S0X_REGISTER_STATUS_NOT_RDY_SET(target, value) \ argument
111 #define ADS114S0X_REGISTER_STATUS_FL_P_RAILP_GET(value) \ argument
114 #define ADS114S0X_REGISTER_STATUS_FL_P_RAILP_SET(target, value) \ argument
119 #define ADS114S0X_REGISTER_STATUS_FL_P_RAILN_GET(value) \ argument
122 #define ADS114S0X_REGISTER_STATUS_FL_P_RAILN_SET(target, value) \ argument
127 #define ADS114S0X_REGISTER_STATUS_FL_N_RAILP_GET(value) \ argument
130 #define ADS114S0X_REGISTER_STATUS_FL_N_RAILP_SET(target, value) \ argument
135 #define ADS114S0X_REGISTER_STATUS_FL_N_RAILN_GET(value) \ argument
138 #define ADS114S0X_REGISTER_STATUS_FL_N_RAILN_SET(target, value) \ argument
143 #define ADS114S0X_REGISTER_STATUS_FL_REF_L1_GET(value) \ argument
146 #define ADS114S0X_REGISTER_STATUS_FL_REF_L1_SET(target, value) \ argument
151 #define ADS114S0X_REGISTER_STATUS_FL_REF_L0_GET(value) \ argument
154 #define ADS114S0X_REGISTER_STATUS_FL_REF_L0_SET(target, value) \ argument
159 #define ADS114S0X_REGISTER_INPMUX_MUXP_GET(value) \ argument
162 #define ADS114S0X_REGISTER_INPMUX_MUXP_SET(target, value) \ argument
167 #define ADS114S0X_REGISTER_INPMUX_MUXN_GET(value) \ argument
170 #define ADS114S0X_REGISTER_INPMUX_MUXN_SET(target, value) \ argument
175 #define ADS114S0X_REGISTER_PGA_DELAY_GET(value) \ argument
178 #define ADS114S0X_REGISTER_PGA_DELAY_SET(target, value) \ argument
183 #define ADS114S0X_REGISTER_PGA_PGA_EN_GET(value) \ argument
186 #define ADS114S0X_REGISTER_PGA_PGA_EN_SET(target, value) \ argument
191 #define ADS114S0X_REGISTER_PGA_GAIN_GET(value) \ argument
194 #define ADS114S0X_REGISTER_PGA_GAIN_SET(target, value) \ argument
199 #define ADS114S0X_REGISTER_DATARATE_G_CHOP_GET(value) \ argument
202 #define ADS114S0X_REGISTER_DATARATE_G_CHOP_SET(target, value) \ argument
207 #define ADS114S0X_REGISTER_DATARATE_CLK_GET(value) \ argument
210 #define ADS114S0X_REGISTER_DATARATE_CLK_SET(target, value) \ argument
215 #define ADS114S0X_REGISTER_DATARATE_MODE_GET(value) \ argument
218 #define ADS114S0X_REGISTER_DATARATE_MODE_SET(target, value) \ argument
223 #define ADS114S0X_REGISTER_DATARATE_FILTER_GET(value) \ argument
226 #define ADS114S0X_REGISTER_DATARATE_FILTER_SET(target, value) \ argument
231 #define ADS114S0X_REGISTER_DATARATE_DR_GET(value) \ argument
234 #define ADS114S0X_REGISTER_DATARATE_DR_SET(target, value) \ argument
239 #define ADS114S0X_REGISTER_REF_FL_REF_EN_GET(value) \ argument
242 #define ADS114S0X_REGISTER_REF_FL_REF_EN_SET(target, value) \ argument
247 #define ADS114S0X_REGISTER_REF_NOT_REFP_BUF_GET(value) \ argument
250 #define ADS114S0X_REGISTER_REF_NOT_REFP_BUF_SET(target, value) \ argument
255 #define ADS114S0X_REGISTER_REF_NOT_REFN_BUF_GET(value) \ argument
258 #define ADS114S0X_REGISTER_REF_NOT_REFN_BUF_SET(target, value) \ argument
263 #define ADS114S0X_REGISTER_REF_REFSEL_GET(value) \ argument
266 #define ADS114S0X_REGISTER_REF_REFSEL_SET(target, value) \ argument
271 #define ADS114S0X_REGISTER_REF_REFCON_GET(value) \ argument
274 #define ADS114S0X_REGISTER_REF_REFCON_SET(target, value) \ argument
279 #define ADS114S0X_REGISTER_IDACMAG_FL_RAIL_EN_GET(value) \ argument
282 #define ADS114S0X_REGISTER_IDACMAG_FL_RAIL_EN_SET(target, value) \ argument
287 #define ADS114S0X_REGISTER_IDACMAG_PSW_GET(value) \ argument
290 #define ADS114S0X_REGISTER_IDACMAG_PSW_SET(target, value) \ argument
295 #define ADS114S0X_REGISTER_IDACMAG_IMAG_GET(value) \ argument
298 #define ADS114S0X_REGISTER_IDACMAG_IMAG_SET(target, value) \ argument
303 #define ADS114S0X_REGISTER_IDACMUX_I2MUX_GET(value) \ argument
306 #define ADS114S0X_REGISTER_IDACMUX_I2MUX_SET(target, value) \ argument
311 #define ADS114S0X_REGISTER_IDACMUX_I1MUX_GET(value) \ argument
314 #define ADS114S0X_REGISTER_IDACMUX_I1MUX_SET(target, value) \ argument
319 #define ADS114S0X_REGISTER_GPIODAT_DIR_GET(value) \ argument
322 #define ADS114S0X_REGISTER_GPIODAT_DIR_SET(target, value) \ argument
327 #define ADS114S0X_REGISTER_GPIODAT_DAT_GET(value) \ argument
330 #define ADS114S0X_REGISTER_GPIODAT_DAT_SET(target, value) \ argument
335 #define ADS114S0X_REGISTER_GPIOCON_CON_GET(value) \ argument
338 #define ADS114S0X_REGISTER_GPIOCON_CON_SET(target, value) \ argument
443 enum ads114s0x_register register_address, uint8_t *value) in ads114s0x_read_register()
482 enum ads114s0x_register register_address, uint8_t value) in ads114s0x_write_register()
1160 int ads114s0x_gpio_set_pin_value(const struct device *dev, uint8_t pin, bool value) in ads114s0x_gpio_set_pin_value()
1189 int ads114s0x_gpio_get_pin_value(const struct device *dev, uint8_t pin, bool *value) in ads114s0x_gpio_get_pin_value()
1221 int ads114s0x_gpio_port_get_raw(const struct device *dev, gpio_port_value_t *value) in ads114s0x_gpio_port_get_raw()
1240 gpio_port_value_t value) in ads114s0x_gpio_port_set_masked_raw()