Lines Matching +full:clock +full:- +full:names
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/i2c/i2c.h>
11 #include "samd5x-pinctrl.dtsi"
15 zephyr,flash-controller = &nvmctrl;
19 #address-cells = <1>;
20 #size-cells = <0>;
24 compatible = "arm,cortex-m4f";
26 #address-cells = <1>;
27 #size-cells = <1>;
30 compatible = "arm,armv7m-mpu";
32 arm,num-mpu-regions = <8>;
38 adc-0 = &adc0;
39 adc-1 = &adc1;
41 port-a = &porta;
42 port-b = &portb;
43 port-c = &portc;
44 port-d = &portd;
46 sercom-0 = &sercom0;
47 sercom-1 = &sercom1;
48 sercom-2 = &sercom2;
49 sercom-3 = &sercom3;
50 sercom-4 = &sercom4;
51 sercom-5 = &sercom5;
52 sercom-6 = &sercom6;
53 sercom-7 = &sercom7;
55 tc-0 = &tc0;
56 tc-2 = &tc2;
57 tc-4 = &tc4;
58 tc-6 = &tc6;
60 tcc-0 = &tcc0;
61 tcc-1 = &tcc1;
62 tcc-2 = &tcc2;
63 tcc-3 = &tcc3;
64 tcc-4 = &tcc4;
75 compatible = "mmio-sram";
80 compatible = "mmio-sram";
85 compatible = "atmel,sam0-id";
93 compatible = "atmel,samd5x-mclk";
95 #clock-cells = <2>;
99 compatible = "atmel,samd5x-gclk";
101 #clock-cells = <1>;
105 compatible = "atmel,sam0-nvmctrl";
109 lock-regions = <32>;
111 #address-cells = <1>;
112 #size-cells = <1>;
115 compatible = "soc-nv-flash";
117 write-block-size = <8>;
122 compatible = "atmel,sam0-dmac";
126 #dma-cells = <2>;
130 compatible = "atmel,sam0-eic";
140 compatible = "atmel,sam0-pinmux";
145 compatible = "atmel,sam0-pinmux";
150 compatible = "atmel,sam0-pinmux";
155 compatible = "atmel,sam0-pinmux";
160 compatible = "atmel,sam0-watchdog";
167 compatible = "atmel,sam0-sercom";
173 clock-names = "GCLK", "MCLK";
177 compatible = "atmel,sam0-sercom";
183 clock-names = "GCLK", "MCLK";
187 compatible = "atmel,sam0-sercom";
193 clock-names = "GCLK", "MCLK";
197 compatible = "atmel,sam0-sercom";
203 clock-names = "GCLK", "MCLK";
207 compatible = "atmel,sam0-sercom";
213 clock-names = "GCLK", "MCLK";
217 compatible = "atmel,sam0-sercom";
223 clock-names = "GCLK", "MCLK";
227 compatible = "atmel,sam0-sercom";
233 clock-names = "GCLK", "MCLK";
237 compatible = "atmel,sam0-sercom";
243 clock-names = "GCLK", "MCLK";
247 compatible = "atmel,sam0-pinctrl";
248 #address-cells = <1>;
249 #size-cells = <1>;
253 compatible = "atmel,sam0-gpio";
256 gpio-controller;
257 #gpio-cells = <2>;
258 #atmel,pin-cells = <2>;
262 compatible = "atmel,sam0-gpio";
265 gpio-controller;
266 #gpio-cells = <2>;
267 #atmel,pin-cells = <2>;
271 compatible = "atmel,sam0-gpio";
274 gpio-controller;
275 #gpio-cells = <2>;
276 #atmel,pin-cells = <2>;
280 compatible = "atmel,sam0-gpio";
283 gpio-controller;
284 #gpio-cells = <2>;
285 #atmel,pin-cells = <2>;
290 compatible = "atmel,sam0-usb";
294 num-bidir-endpoints = <8>;
299 compatible = "atmel,sam-trng";
301 peripheral-id = <0>;
307 compatible = "atmel,sam0-rtc";
310 clock-generator = <0>;
316 compatible = "atmel,sam0-adc";
319 interrupt-names = "overrun", "resrdy";
323 * 16 MHz max, source clock must not exceed 100 MHz.
324 * - table 54-8, section 54.6, page 2020
325 * - table 54-24, section 54.10.4, page 2031
326 * -> 48 MHz GCLK(2) / 4 = 12 MHz
330 #io-channel-cells = <1>;
332 clock-names = "GCLK", "MCLK";
333 calib-offset = <0>;
337 compatible = "atmel,sam0-adc";
340 interrupt-names = "overrun", "resrdy";
344 * 16 MHz max, source clock must not exceed 100 MHz.
345 * - table 54-8, section 54.6, page 2020
346 * - table 54-24, section 54.10.4, page 2031
347 * -> 48 MHz GCLK(2) / 4 = 12 MHz
351 #io-channel-cells = <1>;
353 clock-names = "GCLK", "MCLK";
354 calib-offset = <14>;
358 compatible = "atmel,sam0-tc32";
363 clock-names = "GCLK", "MCLK";
367 compatible = "atmel,sam0-tc32";
372 clock-names = "GCLK", "MCLK";
376 compatible = "atmel,sam0-tc32";
381 clock-names = "GCLK", "MCLK";
385 compatible = "atmel,sam0-tc32";
390 clock-names = "GCLK", "MCLK";
394 compatible = "atmel,sam0-tcc";
400 clock-names = "GCLK", "MCLK";
402 counter-size = <24>;
406 compatible = "atmel,sam0-tcc";
411 clock-names = "GCLK", "MCLK";
413 counter-size = <24>;
417 compatible = "atmel,sam0-tcc";
422 clock-names = "GCLK", "MCLK";
424 counter-size = <16>;
428 compatible = "atmel,sam0-tcc";
433 clock-names = "GCLK", "MCLK";
435 counter-size = <16>;
439 compatible = "atmel,sam0-tcc";
444 clock-names = "GCLK", "MCLK";
446 counter-size = <16>;
452 arm,num-irq-priority-bits = <3>;