Lines Matching +full:8 +full:bit
93 #define DW_SPI_CTRLR0_SCPH BIT(DW_SPI_CTRLR0_SCPH_BIT)
94 #define DW_SPI_CTRLR0_SCPOL BIT(DW_SPI_CTRLR0_SCPOL_BIT)
95 #define DW_SPI_CTRLR0_SRL BIT(DW_SPI_CTRLR0_SRL_BIT)
98 #define DW_SPI_CTRLR0_SLV_OE BIT(DW_SPI_CTRLR0_SLV_OE_BIT)
103 #define DW_SPI_CTRLR0_TMOD_SHIFT (8)
121 /* 0x38 represents the bits 8, 16 and 32. Knowing that 24 is bits 8 and 16
122 * These are the bits were when you divide by 8, you keep the result as it is.
127 (((__bpw) / 8) + 1) : \
128 ((__bpw) / 8))
147 #define DW_SPI_IMR_TXEIM BIT(DW_SPI_IMR_TXEIM_BIT)
148 #define DW_SPI_IMR_TXOIM BIT(DW_SPI_IMR_TXOIM_BIT)
149 #define DW_SPI_IMR_RXUIM BIT(DW_SPI_IMR_RXUIM_BIT)
150 #define DW_SPI_IMR_RXOIM BIT(DW_SPI_IMR_RXOIM_BIT)
151 #define DW_SPI_IMR_RXFIM BIT(DW_SPI_IMR_RXFIM_BIT)
152 #define DW_SPI_IMR_MSTIM BIT(DW_SPI_IMR_MSTIM_BIT)
167 /* ICR Bit */
173 #define DW_SPI_RXFTLR_DFLT ((DW_SPI_FIFO_DEPTH * 5) / 8)
213 DEFINE_MM_REG_WRITE(imr, DW_SPI_REG_IMR, 8)
214 DEFINE_MM_REG_READ(imr, DW_SPI_REG_IMR, 8)
215 DEFINE_MM_REG_READ(isr, DW_SPI_REG_ISR, 8)