Lines Matching refs:regs
35 Tc *regs; member
50 static void wait_synchronization(Tc *regs, uint8_t counter_size) in wait_synchronization() argument
53 while (regs->COUNT8.SYNCBUSY.reg != 0) { in wait_synchronization()
56 while (regs->COUNT16.SYNCBUSY.reg != 0) { in wait_synchronization()
79 Tc *regs = cfg->regs; in pwm_sam0_set_cycles() local
98 inverted = ((regs->COUNT8.DRVCTRL.vec.INVEN & invert_mask) != 0); in pwm_sam0_set_cycles()
99 regs->COUNT8.CCBUF[channel].reg = TC_COUNT8_CCBUF_CCBUF(pulse_cycles); in pwm_sam0_set_cycles()
100 regs->COUNT8.PERBUF.reg = TC_COUNT8_PERBUF_PERBUF(period_cycles); in pwm_sam0_set_cycles()
101 wait_synchronization(regs, counter_size); in pwm_sam0_set_cycles()
104 regs->COUNT8.CTRLA.bit.ENABLE = 0; in pwm_sam0_set_cycles()
105 wait_synchronization(regs, counter_size); in pwm_sam0_set_cycles()
107 regs->COUNT8.DRVCTRL.vec.INVEN ^= invert_mask; in pwm_sam0_set_cycles()
108 regs->COUNT8.CTRLA.bit.ENABLE = 1; in pwm_sam0_set_cycles()
109 wait_synchronization(regs, counter_size); in pwm_sam0_set_cycles()
112 inverted = ((regs->COUNT16.DRVCTRL.vec.INVEN & invert_mask) != 0); in pwm_sam0_set_cycles()
113 regs->COUNT16.CCBUF[0].reg = TC_COUNT16_CCBUF_CCBUF(period_cycles); in pwm_sam0_set_cycles()
114 regs->COUNT16.CCBUF[1].reg = TC_COUNT16_CCBUF_CCBUF(pulse_cycles); in pwm_sam0_set_cycles()
115 wait_synchronization(regs, counter_size); in pwm_sam0_set_cycles()
118 regs->COUNT16.CTRLA.bit.ENABLE = 0; in pwm_sam0_set_cycles()
119 wait_synchronization(regs, counter_size); in pwm_sam0_set_cycles()
121 regs->COUNT16.DRVCTRL.vec.INVEN ^= invert_mask; in pwm_sam0_set_cycles()
122 regs->COUNT16.CTRLA.bit.ENABLE = 1; in pwm_sam0_set_cycles()
123 wait_synchronization(regs, counter_size); in pwm_sam0_set_cycles()
134 Tc *regs = cfg->regs; in pwm_sam0_init() local
154 regs->COUNT8.CTRLA.bit.SWRST = 1; in pwm_sam0_init()
155 wait_synchronization(regs, counter_size); in pwm_sam0_init()
157 regs->COUNT8.CTRLA.reg = cfg->prescaler | TC_CTRLA_MODE_COUNT8 | in pwm_sam0_init()
159 regs->COUNT8.WAVE.reg = TC_WAVE_WAVEGEN_NPWM; in pwm_sam0_init()
160 regs->COUNT8.PER.reg = TC_COUNT8_PER_PER(1); in pwm_sam0_init()
162 regs->COUNT8.CTRLA.bit.ENABLE = 1; in pwm_sam0_init()
163 wait_synchronization(regs, counter_size); in pwm_sam0_init()
165 regs->COUNT16.CTRLA.bit.SWRST = 1; in pwm_sam0_init()
166 wait_synchronization(regs, counter_size); in pwm_sam0_init()
168 regs->COUNT16.CTRLA.reg = cfg->prescaler | TC_CTRLA_MODE_COUNT16 | in pwm_sam0_init()
170 regs->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MPWM; in pwm_sam0_init()
171 regs->COUNT16.CC[0].reg = TC_COUNT16_CC_CC(1); in pwm_sam0_init()
173 regs->COUNT16.CTRLA.bit.ENABLE = 1; in pwm_sam0_init()
174 wait_synchronization(regs, cfg->counter_size); in pwm_sam0_init()
192 .regs = (Tc *)DT_INST_REG_ADDR(inst), \