59 	uint8_t channel_id;  member
85 	gdma_ll_rx_clear_interrupt_status(data->hal.dev, rx->channel_id, intr_status);  in dma_esp32_isr_handle_rx()
101 		rx->cb(dev, rx->user_data, rx->channel_id * 2, status);  in dma_esp32_isr_handle_rx()
110 	gdma_ll_tx_clear_interrupt_status(data->hal.dev, tx->channel_id, intr_status);  in dma_esp32_isr_handle_tx()
115 		tx->cb(dev, tx->user_data, tx->channel_id * 2 + 1, -intr_status);  in dma_esp32_isr_handle_tx()
128 	intr_status = gdma_ll_rx_get_interrupt_status(data->hal.dev, dma_channel_rx->channel_id);  in dma_esp32_isr_handle()
133 	intr_status = gdma_ll_tx_get_interrupt_status(data->hal.dev, dma_channel_tx->channel_id);  in dma_esp32_isr_handle()
230 	gdma_ll_rx_reset_channel(data->hal.dev, dma_channel->channel_id);  in dma_esp32_config_rx()
233 		data->hal.dev, dma_channel->channel_id,  in dma_esp32_config_rx()
243 		gdma_ll_rx_enable_data_burst(data->hal.dev, dma_channel->channel_id,  in dma_esp32_config_rx()
245 		gdma_ll_rx_enable_descriptor_burst(data->hal.dev, dma_channel->channel_id,  in dma_esp32_config_rx()
252 	gdma_ll_rx_enable_interrupt(data->hal.dev, dma_channel->channel_id, GDMA_LL_RX_EVENT_MASK,  in dma_esp32_config_rx()
255 	gdma_ll_rx_clear_interrupt_status(data->hal.dev, dma_channel->channel_id,  in dma_esp32_config_rx()
268 	gdma_ll_tx_reset_channel(data->hal.dev, dma_channel->channel_id);  in dma_esp32_config_tx()
271 		data->hal.dev, dma_channel->channel_id,  in dma_esp32_config_tx()
281 		gdma_ll_tx_enable_data_burst(data->hal.dev, dma_channel->channel_id, true);  in dma_esp32_config_tx()
282 		gdma_ll_tx_enable_descriptor_burst(data->hal.dev, dma_channel->channel_id, true);  in dma_esp32_config_tx()
288 	gdma_ll_tx_enable_interrupt(data->hal.dev, dma_channel->channel_id, GDMA_LL_TX_EVENT_MASK,  in dma_esp32_config_tx()
291 	gdma_ll_tx_clear_interrupt_status(data->hal.dev, dma_channel->channel_id,  in dma_esp32_config_tx()
322 	dma_channel->channel_id = channel / 2;  in dma_esp32_config()
330 			&config->dma_channel[dma_channel->channel_id * 2];  in dma_esp32_config()
332 			&config->dma_channel[(dma_channel->channel_id * 2) + 1];  in dma_esp32_config()
334 		dma_channel_rx->channel_id = dma_channel->channel_id;  in dma_esp32_config()
335 		dma_channel_tx->channel_id = dma_channel->channel_id;  in dma_esp32_config()
370 			&config->dma_channel[dma_channel->channel_id * 2];  in dma_esp32_start()
372 			&config->dma_channel[(dma_channel->channel_id * 2) + 1];  in dma_esp32_start()
374 		gdma_ll_rx_enable_interrupt(data->hal.dev, dma_channel->channel_id,  in dma_esp32_start()
376 		gdma_ll_tx_enable_interrupt(data->hal.dev, dma_channel->channel_id,  in dma_esp32_start()
379 		gdma_ll_rx_set_desc_addr(data->hal.dev, dma_channel->channel_id,  in dma_esp32_start()
381 		gdma_ll_rx_start(data->hal.dev, dma_channel->channel_id);  in dma_esp32_start()
383 		gdma_ll_tx_set_desc_addr(data->hal.dev, dma_channel->channel_id,  in dma_esp32_start()
385 		gdma_ll_tx_start(data->hal.dev, dma_channel->channel_id);  in dma_esp32_start()
388 			gdma_ll_rx_enable_interrupt(data->hal.dev, dma_channel->channel_id,  in dma_esp32_start()
391 			gdma_ll_rx_set_desc_addr(data->hal.dev, dma_channel->channel_id,  in dma_esp32_start()
393 			gdma_ll_rx_start(data->hal.dev, dma_channel->channel_id);  in dma_esp32_start()
395 			gdma_ll_tx_enable_interrupt(data->hal.dev, dma_channel->channel_id,  in dma_esp32_start()
397 			gdma_ll_tx_set_desc_addr(data->hal.dev, dma_channel->channel_id,  in dma_esp32_start()
399 			gdma_ll_tx_start(data->hal.dev, dma_channel->channel_id);  in dma_esp32_start()
421 		gdma_ll_rx_enable_interrupt(data->hal.dev, dma_channel->channel_id,  in dma_esp32_stop()
423 		gdma_ll_tx_enable_interrupt(data->hal.dev, dma_channel->channel_id,  in dma_esp32_stop()
425 		gdma_ll_rx_stop(data->hal.dev, dma_channel->channel_id);  in dma_esp32_stop()
426 		gdma_ll_tx_stop(data->hal.dev, dma_channel->channel_id);  in dma_esp32_stop()
430 		gdma_ll_rx_enable_interrupt(data->hal.dev, dma_channel->channel_id,  in dma_esp32_stop()
432 		gdma_ll_rx_stop(data->hal.dev, dma_channel->channel_id);  in dma_esp32_stop()
434 		gdma_ll_tx_enable_interrupt(data->hal.dev, dma_channel->channel_id,  in dma_esp32_stop()
436 		gdma_ll_tx_stop(data->hal.dev, dma_channel->channel_id);  in dma_esp32_stop()
462 		status->busy = !gdma_ll_rx_is_fsm_idle(data->hal.dev, dma_channel->channel_id);  in dma_esp32_get_status()
465 			data->hal.dev, dma_channel->channel_id);  in dma_esp32_get_status()
473 		status->busy = !gdma_ll_tx_is_fsm_idle(data->hal.dev, dma_channel->channel_id);  in dma_esp32_get_status()
476 			data->hal.dev, dma_channel->channel_id);  in dma_esp32_get_status()
500 		gdma_ll_rx_reset_channel(data->hal.dev, dma_channel->channel_id);  in dma_esp32_reload()
503 		gdma_ll_tx_reset_channel(data->hal.dev, dma_channel->channel_id);  in dma_esp32_reload()