# Copyright (c) 2022-2025 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0
#
# Notes:
# - GPIO pads are numbered from 0-21 and 26-46
# - GPIO46 is fixed to pull-down and is input-only

uart0:
  tx:
    sigo: u0txd_out
    gpio: [[0, 21], [26, 45]]
  rx:
    sigi: u0rxd_in
    gpio: [[0, 21], [26, 46]]
  rts:
    sigo: u0rts_out
    gpio: [[0, 21], [26, 45]]
  cts:
    sigi: u0cts_in
    gpio: [[0, 21], [26, 46]]
  dtr:
    sigo: u0dtr_out
    gpio: [[0, 21], [26, 46]]
  dsr:
    sigi: u0dsr_in
    gpio: [[0, 21], [26, 46]]

uart1:
  tx:
    sigo: u1txd_out
    gpio: [[0, 21], [26, 45]]
  rx:
    sigi: u1rxd_in
    gpio: [[0, 21], [26, 46]]
  rts:
    sigo: u1rts_out
    gpio: [[0, 21], [26, 45]]
  cts:
    sigi: u1cts_in
    gpio: [[0, 21], [26, 46]]
  dtr:
    sigo: u1dtr_out
    gpio: [[0, 21], [26, 46]]
  dsr:
    sigi: u1dsr_in
    gpio: [[0, 21], [26, 46]]

spim2:
  miso:
    sigi: fspiq_in
    gpio: [[0, 21], [26, 46]]
  mosi:
    sigo: fspid_out
    gpio: [[0, 21], [26, 45]]
  sclk:
    sigo: fspiclk_out
    gpio: [[0, 21], [26, 45]]
  csel:
    sigo: fspics0_out
    gpio: [[0, 21], [26, 45]]
  csel1:
    sigo: fspics1_out
    gpio: [[0, 21], [26, 45]]
  csel2:
    sigo: fspics2_out
    gpio: [[0, 21], [26, 45]]
  csel3:
    sigo: fspics3_out
    gpio: [[0, 21], [26, 45]]
  csel4:
    sigo: fspics4_out
    gpio: [[0, 21], [26, 45]]
  csel5:
    sigo: fspics5_out
    gpio: [[0, 21], [26, 45]]

spim3:
  miso:
    sigi: spi3_q_in
    gpio: [[0, 21], [26, 46]]
  mosi:
    sigo: spi3_d_out
    gpio: [[0, 21], [26, 45]]
  sclk:
    sigo: spi3_clk_out_mux
    gpio: [[0, 21], [26, 45]]
  csel:
    sigo: spi3_cs0_out
    gpio: [[0, 21], [26, 45]]
  csel1:
    sigo: spi3_cs1_out
    gpio: [[0, 21], [26, 45]]
  csel2:
    sigo: spi3_cs2_out
    gpio: [[0, 21], [26, 45]]

i2c0:
  sda:
    sigi: i2cext0_sda_in
    sigo: i2cext0_sda_out
    gpio: [[0, 21], [26, 45]]
  scl:
    sigi: i2cext0_scl_in
    sigo: i2cext0_scl_out
    gpio: [[0, 21], [26, 45]]

i2c1:
  sda:
    sigi: i2cext1_sda_in
    sigo: i2cext1_sda_out
    gpio: [[0, 21], [26, 45]]
  scl:
    sigi: i2cext1_scl_in
    sigo: i2cext1_scl_out
    gpio: [[0, 21], [26, 45]]

i2s0:
  mclk:
    sigo: clk_i2s
    gpio: [[0, 21], [26, 46]]
  i_bck:
    sigi: i2s0i_bck_in
    sigo: i2s0i_bck_out
    gpio: [[0, 21], [26, 46]]
  i_ws:
    sigi: i2s0i_ws_in
    sigo: i2s0i_ws_out
    gpio: [[0, 21], [26, 46]]
  i_sd:
    sigi: i2s0i_data_in15
    gpio: [[0, 21], [26, 46]]
  o_bck:
    sigi: i2s0o_bck_in
    sigo: i2s0o_bck_out
    gpio: [[0, 21], [26, 46]]
  o_ws:
    sigi: i2s0o_ws_in
    sigo: i2s0o_ws_out
    gpio: [[0, 21], [26, 46]]
  o_sd:
    sigo: i2s0o_data_out23
    gpio: [[0, 21], [26, 45]]

twai:
  rx:
    sigi: twai_rx
    gpio: [[0, 21], [26, 46]]
  tx:
    sigo: twai_tx
    gpio: [[0, 21], [26, 45]]
  clkout:
    sigo: twai_clkout
    gpio: [[0, 21], [26, 45]]
  bus_off:
    sigo: twai_bus_off_on
    gpio: [[0, 21], [26, 45]]

ledc:
  ch0:
    sigo: ledc_ls_sig_out0
    gpio: [[0, 21], [26, 45]]
  ch1:
    sigo: ledc_ls_sig_out1
    gpio: [[0, 21], [26, 45]]
  ch2:
    sigo: ledc_ls_sig_out2
    gpio: [[0, 21], [26, 45]]
  ch3:
    sigo: ledc_ls_sig_out3
    gpio: [[0, 21], [26, 45]]
  ch4:
    sigo: ledc_ls_sig_out4
    gpio: [[0, 21], [26, 45]]
  ch5:
    sigo: ledc_ls_sig_out5
    gpio: [[0, 21], [26, 45]]
  ch6:
    sigo: ledc_ls_sig_out6
    gpio: [[0, 21], [26, 45]]
  ch7:
    sigo: ledc_ls_sig_out7
    gpio: [[0, 21], [26, 45]]

pcnt0:
  ch0sig:
    sigi: pcnt_sig_ch0_in0
    gpio: [[0, 21], [26, 46]]
  ch0ctrl:
    sigi: pcnt_ctrl_ch0_in0
    gpio: [[0, 21], [26, 46]]
  ch1sig:
    sigi: pcnt_sig_ch1_in0
    gpio: [[0, 21], [26, 46]]
  ch1ctrl:
    sigi: pcnt_ctrl_ch1_in0
    gpio: [[0, 21], [26, 46]]

pcnt1:
  ch0sig:
    sigi: pcnt_sig_ch0_in1
    gpio: [[0, 21], [26, 46]]
  ch0ctrl:
    sigi: pcnt_ctrl_ch0_in1
    gpio: [[0, 21], [26, 46]]
  ch1sig:
    sigi: pcnt_sig_ch1_in1
    gpio: [[0, 21], [26, 46]]
  ch1ctrl:
    sigi: pcnt_ctrl_ch1_in1
    gpio: [[0, 21], [26, 46]]

pcnt2:
  ch0sig:
    sigi: pcnt_sig_ch0_in3
    gpio: [[0, 21], [26, 46]]
  ch0ctrl:
    sigi: pcnt_ctrl_ch0_in2
    gpio: [[0, 21], [26, 46]]
  ch1sig:
    sigi: pcnt_sig_ch1_in2
    gpio: [[0, 21], [26, 46]]
  ch1ctrl:
    sigi: pcnt_ctrl_ch1_in2
    gpio: [[0, 21], [26, 46]]

pcnt3:
  ch0sig:
    sigi: pcnt_sig_ch0_in3
    gpio: [[0, 21], [26, 46]]
  ch0ctrl:
    sigi: pcnt_ctrl_ch0_in3
    gpio: [[0, 21], [26, 46]]
  ch1sig:
    sigi: pcnt_sig_ch1_in3
    gpio: [[0, 21], [26, 46]]
  ch1ctrl:
    sigi: pcnt_ctrl_ch1_in3
    gpio: [[0, 21], [26, 46]]
