readme_threadx.txt
1 Microsoft's Azure RTOS ThreadX for Renesas RXv3
2
3 Using the CC-RX Tools
4
51. Building the ThreadX run-time Library
6
7Please see the Samples repository on GitHub for the Azure RTOS demonstrations
8for the RXv3.
9
10
112. Demonstration System
12
13Please see the Samples repository on GitHub for the Azure RTOS demonstrations
14for the RXv3
15
16
173. System Initialization
18
19The system entry point using Renesas tools is at the label _PowerON_Reset_PC.
20Use the resetprg.c file that comes with your release. Most notable is that Threadx
21applications run in supervisor mode and do not use user mode. Hence switching to
22user mode has been commented out.
23
24The vector area is set up using either intprg.c or in the file tx_initialize_low_level.src.
25The file tx_initialize_low_level.src is responsible for setting up various system data
26structures, interrupt vectors, and a periodic timer. This is the ideal place add
27application specific hardware initialization code.
28
29ThreadX utilizes CMT0 as a periodic timer interrupt source. The CMT0 interrupt is
30typically setup for 10ms periodic interrupts and the interrupt priority level is set to
31level 5 with the symbol CMT_RX_CFG_IPR in r_cmt_rx_config.h of Renesas CMT timer module
32(r_cmt_rx). You may change any of the timer parameters to suit your needs.
33
34In addition, _tx_initialize_low_level determines the first available address for use by
35the application, which is supplied as the sole input parameter to your application
36definition function, tx_application_define(). The mechanism is implemented by creating the
37FREEMEM section, this section should be linked last in the RAM area. tx_initialize_low_level
38will pick up the starting label of this section and put it in the global variable:
39_tx_initialize_unused_memory
40
41
424. Context Switch, Register Usage and Stack Frames
43
44The RXv3 port for ThreadX uses the first software interrupt, SWINT, i.e., interrupt #27,
45to perform context switch with the interrupt priority level 1. This ISR is thus reserved
46when using ThreadX and the SWINT should not be manipulated in any way by the application.
47The port will setup the interrupt within _tx_initialize_low_level and the compiler will
48automatically install the necessary interrupt vector. As such no additional initialization
49is necessary by the application.
50
51The following defines the saved context stack frame used by the ThreadX port. The
52state of the CPU registers at the time of a context switch is saved on the running
53thread's stack The top of the suspended thread's stack is pointed to by
54tx_thread_stack_ptr in the associated thread control block TX_THREAD.
55
56 Offset Stack Frame without DFPU Register
57
58 0x00 ACC0
59 0x04 ACC1
60 0x08 R6
61 0x0C R7
62 0x10 R8
63 0x14 R9
64 0x18 R10
65 0x1C R11
66 0x20 R12
67 0x24 R13
68 0x28 FPSW
69 0x2C R14
70 0x30 R15
71 0x34 R3
72 0x38 R4
73 0x3C R5
74 0x40 R1
75 0x44 R2
76 0x48 PC - return address
77 0x4C PSW
78
79 Offset Stack Frame with DFPU Register
80
81 0x00 DPSW
82 0x04 DCMR
83 0x08 DECNT
84 0x0C DEPC
85 0x10 DR0
86 0x14 DR1
87 0x18 DR2
88 0x1C DR3
89 0x20 DR4
90 0x24 DR5
91 0x28 DR6
92 0x2C DR7
93 0x30 DR8
94 0x34 DR9
95 0x38 DR10
96 0x3C DR11
97 0x40 DR12
98 0x44 DR13
99 0x48 DR14
100 0x4C DR15
101 0x50 ACC0
102 0x54 ACC1
103 0x58 R6
104 0x5C R7
105 0x60 R8
106 0x64 R9
107 0x68 R10
108 0x6C R11
109 0x70 R12
110 0x74 R13
111 0x78 FPSW
112 0x7C R14
113 0x80 R15
114 0x84 R3
115 0x88 R4
116 0x8C R5
117 0x90 R1
118 0x94 R2
119 0x98 PC - return address
120 0x9C PSW
121
122Note: By default ccrx does not save the state of the accumulator registers ACC0 and ACC1
123when entering an ISR. This means that if the ISR uses any of the DSP instructions the
124content of those registers could be corrupted. Saving and restoring of the accumulators
125can be enabled by adding the -save_acc command line option.
126
127
1285. Double Precision FPU Instructions Support
129
130The RXv3 architecture supports an optional set of double precision instructions which
131makes use of a new set of registers that must be saved and restored during context
132switches. This feature can be accessed by adding the -dfpu compiler switch.
133To reduce the overhead of saving and restoring the FPU registers for all threads
134the RXv3 port allows each thread to enable and disable saving and restoring the DFPU
135registers. By default the feature is disabled for new threads. To enable the feature
136tx_thread_fpu_enable() must be called within the context of every thread that will
137perform FPU operation. The saving and restoring of DFPU registers can be disabled
138again by calling tx_thread_fpu_disable(). This can be useful if a thread only makes
139occasional use of the FPU.
140
141
1426. Improving Performance
143
144The distribution version of ThreadX is built without any compiler
145optimizations. This makes it easy to debug because you can trace or set
146breakpoints inside of ThreadX itself. Of course, this costs some
147performance. To make ThreadX run faster, you can change the ThreadX Library
148project to disable debug information and enable the desired optimizations.
149
150In addition, you can eliminate the ThreadX basic API error checking by
151compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING
152defined before tx_api.h is included.
153
154
1557. Timer Processing
156
157Timer processing is performed by calling __tx_timer_interrupt(). This should usually be done
158from within the callback of a periodic timer with a period of 100Hz. In the sample projects
159a Renesas Fit CMT periodic timer module (r_cmt_rx) is used as the timer source.
160
161
1628. Interrupt Handling
163
164Interrupt handling is unaffected by the ThreadX port as such user interrupts can be
165written according to the toolchain's documentation. It is recommended not to use interrupt
166priority 1 as this is the priority of the context switch interrupt. However using interrupt
167priority 1 won't cause any negative side effects but doing so may slightly reduce
168performance. Please refer to the toolchain documentation for additional details on how to
169define interrupt service routines.
170
171
1729. Execution Profiling
173
174The RX port adds support for the Execution Profiling Kit (EPK). The EPK consists
175of the files tx_execution_profile.c and tx_execution_profile.h. See the documentation
176of the EPK for generic usage details.
177
178To add the EPK to your RXv3 release make the following modifications:
179
180* Enable the following define for both the Threadx library and the application
181TX_EXECUTION_PROFILE_ENABLE
182
183* Setup CMT1 as a free running 16 bit timer.
184
185* In tx_execution_profile.h, change following around line 52:
186
187#ifdef TX_EXECUTION_64BIT_TIME
188typedef unsigned long long EXECUTION_TIME;
189#define TX_EXECUTION_MAX_TIME_SOURCE 0xFFFFFFFFFFFFFFFF
190#else
191typedef unsigned long EXECUTION_TIME;
192#define TX_EXECUTION_MAX_TIME_SOURCE 0xFFFF
193#endif
194
195/* Define basic constants for the execution profile kit. */
196
197#define TX_EXECUTION_TIME_SOURCE (EXECUTION_TIME) *((USHORT *) 0x8800A)
198
199Rebuild the Threadx library and the application.
200Refer to the EPK documentation how to interpret the results.
201
202
20310. Revision History
204
205For generic code revision information, please refer to the readme_threadx_generic.txt
206file, which is included in your distribution. The following details the revision
207information associated with this specific port of ThreadX:
208
209For generic code revision information, please refer to the readme_threadx_generic.txt
210file, which is included in your distribution. The following details the revision
211information associated with this specific port of ThreadX:
212
21304-25-2022 Release 6.1.11 changes:
214 tx_thread_schedule.src Added low power support
215
21601-31-2022 Release 6.1.10 changes:
217 tx_port.h Removed system state macro, and added
218 missing interrupt control defines
219 tx_timer_interrupt.src Added missing thread preemption logic
220
22110-15-2021 Release 6.1.9 changes:
222 tx_port.h Added FPU support
223 tx_thread_context_restore.src Added FPU support
224 tx_thread_schedule.src Added FPU support
225 tx_thread_system_return.src Added FPU support
226
22706-02-2021 Initial ThreadX release for the RXv3 using CC-RXX tools, version 6.1.7
228
229
230Copyright(c) 1996-2022 Microsoft Corporation
231
232
233https://azure.com/rtos
234
