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Searched refs:_tx_misra_control_set (Results 1 – 25 of 78) sorted by relevance

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/ThreadX-v6.4.1/ports_module/cortex_m0+/ac6/inc/
Dtx_port.h226 void _tx_misra_control_set(ULONG value);
269_tx_misra_control_set(_tx_vfp_state); \
323_tx_misra_control_set(_tx_vfp_state); \
340_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports_module/cortex_m0+/gnu/inc/
Dtx_port.h240 void _tx_misra_control_set(ULONG value);
283_tx_misra_control_set(_tx_vfp_state); \
337_tx_misra_control_set(_tx_vfp_state); \
354_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports_module/cortex_m23/ac6/inc/
Dtx_port.h339 void _tx_misra_control_set(ULONG value);
381_tx_misra_control_set(_tx_vfp_state); \
435_tx_misra_control_set(_tx_vfp_state); \
452_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports_module/cortex_m0+/iar/inc/
Dtx_port.h296 void _tx_misra_control_set(ULONG value);
339_tx_misra_control_set(_tx_vfp_state); \
393_tx_misra_control_set(_tx_vfp_state); \
410_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m33/ac6/inc/
Dtx_port.h350 void _tx_misra_control_set(ULONG value);
395_tx_misra_control_set(_tx_vfp_state); \
446_tx_misra_control_set(_tx_vfp_state); \
463_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m33/gnu/inc/
Dtx_port.h350 void _tx_misra_control_set(ULONG value);
395_tx_misra_control_set(_tx_vfp_state); \
446_tx_misra_control_set(_tx_vfp_state); \
463_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m33/iar/inc/
Dtx_port.h350 void _tx_misra_control_set(ULONG value);
395_tx_misra_control_set(_tx_vfp_state); \
446_tx_misra_control_set(_tx_vfp_state); \
463_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m55/gnu/inc/
Dtx_port.h350 void _tx_misra_control_set(ULONG value);
395_tx_misra_control_set(_tx_vfp_state); \
446_tx_misra_control_set(_tx_vfp_state); \
463_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m55/iar/inc/
Dtx_port.h350 void _tx_misra_control_set(ULONG value);
395_tx_misra_control_set(_tx_vfp_state); \
446_tx_misra_control_set(_tx_vfp_state); \
463_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m55/ac6/inc/
Dtx_port.h350 void _tx_misra_control_set(ULONG value);
395_tx_misra_control_set(_tx_vfp_state); \
446_tx_misra_control_set(_tx_vfp_state); \
463_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports_arch/ARMv8-M/threadx/inc/
Dtx_port.h350 void _tx_misra_control_set(ULONG value);
395_tx_misra_control_set(_tx_vfp_state); \
446_tx_misra_control_set(_tx_vfp_state); \
463_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m85/ac6/inc/
Dtx_port.h350 void _tx_misra_control_set(ULONG value);
395_tx_misra_control_set(_tx_vfp_state); \
446_tx_misra_control_set(_tx_vfp_state); \
463_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m85/gnu/inc/
Dtx_port.h350 void _tx_misra_control_set(ULONG value);
395_tx_misra_control_set(_tx_vfp_state); \
446_tx_misra_control_set(_tx_vfp_state); \
463_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m85/iar/inc/
Dtx_port.h350 void _tx_misra_control_set(ULONG value);
395_tx_misra_control_set(_tx_vfp_state); \
446_tx_misra_control_set(_tx_vfp_state); \
463_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m3/ac5/inc/
Dtx_port.h301 void _tx_misra_control_set(ULONG value);
367_tx_misra_control_set(_tx_vfp_state); \
419_tx_misra_control_set(_tx_vfp_state); \
436_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m4/ac5/inc/
Dtx_port.h301 void _tx_misra_control_set(ULONG value);
367_tx_misra_control_set(_tx_vfp_state); \
419_tx_misra_control_set(_tx_vfp_state); \
436_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m4/ac6/inc/
Dtx_port.h301 void _tx_misra_control_set(ULONG value);
367_tx_misra_control_set(_tx_vfp_state); \
419_tx_misra_control_set(_tx_vfp_state); \
436_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m7/ac5/inc/
Dtx_port.h301 void _tx_misra_control_set(ULONG value);
367_tx_misra_control_set(_tx_vfp_state); \
419_tx_misra_control_set(_tx_vfp_state); \
436_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m7/gnu/inc/
Dtx_port.h301 void _tx_misra_control_set(ULONG value);
367_tx_misra_control_set(_tx_vfp_state); \
419_tx_misra_control_set(_tx_vfp_state); \
436_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m7/ac6/inc/
Dtx_port.h301 void _tx_misra_control_set(ULONG value);
367_tx_misra_control_set(_tx_vfp_state); \
419_tx_misra_control_set(_tx_vfp_state); \
436_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m7/iar/inc/
Dtx_port.h301 void _tx_misra_control_set(ULONG value);
367_tx_misra_control_set(_tx_vfp_state); \
419_tx_misra_control_set(_tx_vfp_state); \
436_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m3/ac6/inc/
Dtx_port.h301 void _tx_misra_control_set(ULONG value);
367_tx_misra_control_set(_tx_vfp_state); \
419_tx_misra_control_set(_tx_vfp_state); \
436_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m3/gnu/inc/
Dtx_port.h301 void _tx_misra_control_set(ULONG value);
367_tx_misra_control_set(_tx_vfp_state); \
419_tx_misra_control_set(_tx_vfp_state); \
436_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m3/keil/inc/
Dtx_port.h301 void _tx_misra_control_set(ULONG value);
367_tx_misra_control_set(_tx_vfp_state); \
419_tx_misra_control_set(_tx_vfp_state); \
436_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.4.1/ports/cortex_m3/iar/inc/
Dtx_port.h301 void _tx_misra_control_set(ULONG value);
367_tx_misra_control_set(_tx_vfp_state); \
419_tx_misra_control_set(_tx_vfp_state); \
436_tx_misra_control_set(_tx_vfp_state); \

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