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Searched refs:Timer1Load (Results 1 – 2 of 2) sorted by relevance

/ThreadX-v6.4.1/ports/arm9/ac5/example_build/
Dtx_initialize_low_level.s62 Timer1Load EQU 0x0a800000 ; Timer1 Load Register define
222 LDR r0,=Timer1Load ; Build address of Timer1 load register
/ThreadX-v6.4.1/ports/arm11/ac5/example_build/
Dtx_initialize_low_level.s62 Timer1Load EQU 0x0a800000 ; Timer1 Load Register define
222 LDR r0,=Timer1Load ; Build address of Timer1 load register