| /ThreadX-v6.3.0/ports/cortex_m3/ghs/inc/ |
| D | tx_port.h | 154 #define read_tbu() _tx_el_time_base_upper
|
| /ThreadX-v6.3.0/ports/cortex_m7/ghs/inc/ |
| D | tx_port.h | 154 #define read_tbu() _tx_el_time_base_upper
|
| /ThreadX-v6.3.0/ports/cortex_m4/ghs/inc/ |
| D | tx_port.h | 154 #define read_tbu() _tx_el_time_base_upper
|
| /ThreadX-v6.3.0/ports/cortex_m3/ghs/src/ |
| D | tx_el.c | 43 ULONG _tx_el_time_base_upper; variable
215 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports/cortex_r4/ghs/src/ |
| D | tx_el.c | 43 ULONG _tx_el_time_base_upper; variable
215 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports/cortex_m4/ghs/src/ |
| D | tx_el.c | 43 ULONG _tx_el_time_base_upper; variable
215 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports/cortex_m7/ghs/src/ |
| D | tx_el.c | 43 ULONG _tx_el_time_base_upper; variable
215 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports/cortex_a8/ghs/src/ |
| D | tx_el.c | 43 ULONG _tx_el_time_base_upper; variable
215 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports/cortex_a9/ghs/src/ |
| D | tx_el.c | 43 ULONG _tx_el_time_base_upper; variable
215 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports/cortex_r5/ghs/src/ |
| D | tx_el.c | 43 ULONG _tx_el_time_base_upper; variable
215 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports/cortex_r7/ghs/src/ |
| D | tx_el.c | 43 ULONG _tx_el_time_base_upper; variable
215 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports_smp/mips32_interaptiv_smp/green/src/ |
| D | tx_el.c | 44 ULONG _tx_el_time_base_upper; variable
216 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports_arch/ARMv7-M/threadx/ghs/src/ |
| D | tx_el.c | 43 ULONG _tx_el_time_base_upper; variable
215 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports_smp/cortex_a5x_smp/green/src/ |
| D | tx_el.c | 44 ULONG _tx_el_time_base_upper; variable
216 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports/cortex_a5/ghs/src/ |
| D | tx_el.c | 43 ULONG _tx_el_time_base_upper; variable
215 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports/cortex_a7/ghs/src/ |
| D | tx_el.c | 43 ULONG _tx_el_time_base_upper; variable
215 _tx_el_time_base_upper = 0; in _tx_el_initialize()
|
| /ThreadX-v6.3.0/ports/cortex_r4/ghs/inc/ |
| D | tx_port.h | 142 #define read_tbu() _tx_el_time_base_upper
|
| /ThreadX-v6.3.0/ports/cortex_a8/ghs/inc/ |
| D | tx_port.h | 142 #define read_tbu() _tx_el_time_base_upper
|
| /ThreadX-v6.3.0/ports/cortex_a9/ghs/inc/ |
| D | tx_port.h | 142 #define read_tbu() _tx_el_time_base_upper
|
| /ThreadX-v6.3.0/ports/cortex_r5/ghs/inc/ |
| D | tx_port.h | 142 #define read_tbu() _tx_el_time_base_upper
|
| /ThreadX-v6.3.0/ports/cortex_r7/ghs/inc/ |
| D | tx_port.h | 142 #define read_tbu() _tx_el_time_base_upper
|
| /ThreadX-v6.3.0/ports_arch/ARMv7-M/threadx/ghs/inc/ |
| D | tx_port.h | 172 #define read_tbu() _tx_el_time_base_upper
|
| /ThreadX-v6.3.0/ports/cortex_a7/ghs/inc/ |
| D | tx_port.h | 142 #define read_tbu() _tx_el_time_base_upper
|
| /ThreadX-v6.3.0/ports/cortex_a5/ghs/inc/ |
| D | tx_port.h | 142 #define read_tbu() _tx_el_time_base_upper
|
| /ThreadX-v6.3.0/ports/cortex_m3/ac5/inc/ |
| D | tx_port.h | 198 #define read_tbu() _tx_el_time_base_upper
|
