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Searched refs:TX_INT_DISABLE (Results 1 – 25 of 215) sorted by relevance

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/ThreadX-v6.3.0/ports/linux/gnu/src/
Dtx_thread_interrupt_control.c39 previous_value = _tx_thread_interrupt_control(TX_INT_DISABLE); in _tx_thread_interrupt_disable()
135 old_posture = TX_INT_DISABLE; in _tx_thread_interrupt_control()
152 else if (new_posture == TX_INT_DISABLE) in _tx_thread_interrupt_control()
172 else if (new_posture == TX_INT_DISABLE) in _tx_thread_interrupt_control()
/ThreadX-v6.3.0/ports/win32/vs_2019/src/
Dtx_thread_interrupt_control.c41 previous_value = _tx_thread_interrupt_control(TX_INT_DISABLE); in _tx_thread_interrupt_disable()
165 old_posture = TX_INT_DISABLE; in _tx_thread_interrupt_control()
182 else if (new_posture == TX_INT_DISABLE) in _tx_thread_interrupt_control()
202 else if (new_posture == TX_INT_DISABLE) in _tx_thread_interrupt_control()
/ThreadX-v6.3.0/ports_smp/linux/gnu/src/
Dtx_thread_interrupt_control.c40 previous_value = _tx_thread_interrupt_control(TX_INT_DISABLE); in _tx_thread_interrupt_disable()
157 old_posture = TX_INT_DISABLE; in _tx_thread_interrupt_control()
174 else if (new_posture == TX_INT_DISABLE) in _tx_thread_interrupt_control()
194 else if (new_posture == TX_INT_DISABLE) in _tx_thread_interrupt_control()
/ThreadX-v6.3.0/test/tx/regression/
Dthreadx_interrupt_control_test.c67 saved_interrupt_posture = tx_interrupt_control(TX_INT_DISABLE); in thread_0_entry()
79 if (saved_interrupt_posture != TX_INT_DISABLE) in thread_0_entry()
/ThreadX-v6.3.0/test/smp/regression/
Dthreadx_interrupt_control_test.c67 saved_interrupt_posture = tx_interrupt_control(TX_INT_DISABLE); in thread_0_entry()
79 if (saved_interrupt_posture != TX_INT_DISABLE) in thread_0_entry()
/ThreadX-v6.3.0/ports/c667x/ccs/inc/
Dtx_port.h127 #define TX_INT_DISABLE 0x00 /* Disable interrupts */ macro
252 #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
/ThreadX-v6.3.0/ports/risc-v32/iar/inc/
Dtx_port.h125 #define TX_INT_DISABLE 0x00000000 /* Disable interrupts value */ macro
243 …ISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
/ThreadX-v6.3.0/ports/cortex_a9/iar/inc/
Dtx_port.h127 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
129 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
349 __set_CPSR(interrupt_save | TX_INT_DISABLE);
/ThreadX-v6.3.0/ports/cortex_a8/iar/inc/
Dtx_port.h127 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
129 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
348 __set_CPSR(interrupt_save | TX_INT_DISABLE);
/ThreadX-v6.3.0/ports/arm9/iar/inc/
Dtx_port.h127 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
129 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
346 __set_CPSR(interrupt_save | TX_INT_DISABLE);
/ThreadX-v6.3.0/ports/arm11/iar/inc/
Dtx_port.h127 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
129 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
346 __set_CPSR(interrupt_save | TX_INT_DISABLE);
/ThreadX-v6.3.0/ports/cortex_a5/iar/inc/
Dtx_port.h127 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
129 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
347 __set_CPSR(interrupt_save | TX_INT_DISABLE);
/ThreadX-v6.3.0/ports/cortex_a7/iar/inc/
Dtx_port.h127 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
129 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
347 __set_CPSR(interrupt_save | TX_INT_DISABLE);
/ThreadX-v6.3.0/ports/cortex_a15/iar/inc/
Dtx_port.h127 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
129 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
349 __set_CPSR(interrupt_save | TX_INT_DISABLE);
/ThreadX-v6.3.0/ports/cortex_r4/gnu/inc/
Dtx_port.h126 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
128 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
/ThreadX-v6.3.0/ports/cortex_r5/ac6/inc/
Dtx_port.h126 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
128 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
/ThreadX-v6.3.0/ports/cortex_r5/gnu/inc/
Dtx_port.h126 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
128 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
/ThreadX-v6.3.0/ports/risc-v64/gnu/inc/
Dtx_port.h145 #define TX_INT_DISABLE 0x00000000 /* Disable interrupts value */ macro
263 …ISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
/ThreadX-v6.3.0/ports/xtensa/xcc/inc/
Dtx_port.h249 #define TX_INT_DISABLE 0x8 /* Disable interrupts value */ macro
252 #define TX_INT_DISABLE XCHAL_EXCM_LEVEL /* Disable interrupts value */ macro
445 #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
/ThreadX-v6.3.0/ports/cortex_a9/gnu/inc/
Dtx_port.h128 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
130 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
/ThreadX-v6.3.0/ports_arch/ARMv7-A/threadx/common/inc/
Dtx_port.h128 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
130 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
/ThreadX-v6.3.0/ports/cortex_r4/ac5/inc/
Dtx_port.h123 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
125 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
/ThreadX-v6.3.0/ports/cortex_r4/ac6/inc/
Dtx_port.h126 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
128 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
/ThreadX-v6.3.0/ports/cortex_r5/ac5/inc/
Dtx_port.h123 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
125 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro
/ThreadX-v6.3.0/ports/cortex_a8/ac5/inc/
Dtx_port.h123 #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ macro
125 #define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */ macro

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