| /ThreadX-v6.3.0/ports_module/cortex_r4/ac6/module_manager/src/ |
| D | tx_thread_fiq_nesting_start.S | 32 #define SYS_MODE 0x12 // System mode macro 91 CPS #SYS_MODE // Switch to system mode
|
| D | tx_thread_irq_nesting_start.S | 32 #define SYS_MODE 0x1F // System mode bits macro 91 CPS #SYS_MODE // Switch to System Mode
|
| D | tx_thread_context_restore.S | 37 #define SYS_MODE 0x1F // SYS mode macro 186 … CPS #SYS_MODE // Switch to SYS mode to save context on thread stack 194 …CPS #SYS_MODE // Switch to SYS mode to save remaining context on thr… 246 ORR r1, r1, #SYS_MODE // Change to SYS Mode
|
| D | tx_thread_schedule.S | 46 #define SYS_MODE 0x1F // SYS mode macro 178 ORR r0, r0, #SYS_MODE // system mode code 182 CPS #SYS_MODE // Switch to SYS mode 220 CPS #SYS_MODE // Switch to SYS mode 317 CPS #SYS_MODE // Enter SYS mode 380 CPS #SYS_MODE // Enter SYS mode 391 CPS #SYS_MODE // Enter SYS mode 402 CPS #SYS_MODE // Enter SYS mode
|
| D | tx_thread_stack_build.S | 33 #define SYS_MODE 0x1F // SYS mode macro 150 ORR r3, r3, #SYS_MODE // Build CPSR, SYS mode, interrupts enabled
|
| D | txm_module_manager_thread_stack_build.S | 26 #define SYS_MODE 0x1F // SYS mode macro 137 ORREQ r3, r3, #SYS_MODE // Flag not set: Build CPSR, SYS mode, IRQ enabled
|
| /ThreadX-v6.3.0/ports/cortex_r4/ac6/src/ |
| D | tx_thread_fiq_nesting_start.S | 32 #define SYS_MODE 0x12 // System mode macro 91 CPS #SYS_MODE // Switch to system mode
|
| D | tx_thread_irq_nesting_start.S | 32 #define SYS_MODE 0x1F // System mode bits macro 91 CPS #SYS_MODE // Switch to System Mode
|
| /ThreadX-v6.3.0/ports_module/cortex_r4/iar/module_manager/src/ |
| D | tx_thread_irq_nesting_start.s | 24 SYS_MODE DEFINE 0x1F ; System mode label 78 CPS #SYS_MODE ; Enter SYS mode
|
| D | tx_thread_stack_build.s | 24 SYS_MODE DEFINE 0x1F ; SYS mode label 130 ORR r3, r1, #SYS_MODE ; Build CPSR, SYS mode, interrupts enabled
|
| /ThreadX-v6.3.0/ports/cortex_r4/iar/src/ |
| D | tx_thread_irq_nesting_start.s | 34 SYS_MODE DEFINE 0x1F ; System mode label 88 CPS #SYS_MODE ; Enter SYS mode
|
| /ThreadX-v6.3.0/ports/cortex_r5/iar/src/ |
| D | tx_thread_irq_nesting_start.s | 34 SYS_MODE DEFINE 0x1F ; System mode label 88 CPS #SYS_MODE ; Enter SYS mode
|
| /ThreadX-v6.3.0/ports_module/cortex_a7/gnu/module_manager/src/ |
| D | tx_thread_context_restore.s | 31 SYS_MODE = 0x1F // SYS mode define 143 CPS #SYS_MODE // Enter SYS mode 148 CPS #SYS_MODE // Enter SYS mode
|
| D | tx_thread_schedule.s | 40 #define SYS_MODE 0x1F // SYS mode macro 191 ORR r0, r0, #SYS_MODE // system mode code 195 CPS #SYS_MODE // Switch to SYS mode 245 CPS #SYS_MODE // Switch to SYS mode 341 CPS #SYS_MODE // Enter SYS mode 394 CPS #SYS_MODE // Enter SYS mode 406 CPS #SYS_MODE // Enter SYS mode 417 CPS #SYS_MODE // Enter SYS mode
|
| D | tx_thread_stack_build.s | 32 SYS_MODE = 0x1F // SYS mode define 133 ORR r3, #SYS_MODE // Build CPSR, SYS mode, interrupts enabled
|
| D | txm_module_manager_thread_stack_build.s | 32 #define SYS_MODE 0x1F // SYS mode macro 155 ORREQ r3, #SYS_MODE // Flag not set: Build CPSR, SYS mode, IRQ enabled
|
| /ThreadX-v6.3.0/ports_module/cortex_a7/iar/module_manager/src/ |
| D | tx_thread_context_restore.s | 28 SYS_MODE EQU 0x1F ; SYS mode define 142 CPS #SYS_MODE ; Enter SYS mode 147 CPS #SYS_MODE ; Enter SYS mode
|
| /ThreadX-v6.3.0/ports_module/cortex_r4/ac6/example_build/sample_threadx/ |
| D | tx_initialize_low_level.S | 38 #define SYS_MODE 0x1F // SYS mode macro 436 CPS #SYS_MODE // Enter SYS mode 444 ORR r0, r0, #SYS_MODE // Return into SYS mode
|
| /ThreadX-v6.3.0/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/ |
| D | tx_initialize_low_level.S | 38 #define SYS_MODE 0x1F // SYS mode macro 436 CPS #SYS_MODE // Enter SYS mode 444 ORR r0, r0, #SYS_MODE // Return into SYS mode
|
| /ThreadX-v6.3.0/ports_module/cortex_a7/gnu/example_build/ |
| D | tx_initialize_low_level.s | 33 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define 122 MOV r3, #SYS_MODE // Build SYS mode CPSR 417 ORR r0, r0, #SYS_MODE // Return into SYS mode
|
| /ThreadX-v6.3.0/ports_arch/ARMv7-A/threadx/ports/ac6/example_build/sample_threadx/ |
| D | tx_initialize_low_level.S | 28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define 119 MOV r3, #SYS_MODE // Build SYS mode CPSR
|
| /ThreadX-v6.3.0/ports/cortex_a8/ac6/example_build/sample_threadx/ |
| D | tx_initialize_low_level.S | 28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define 119 MOV r3, #SYS_MODE // Build SYS mode CPSR
|
| /ThreadX-v6.3.0/ports/cortex_a9/ac6/example_build/sample_threadx/ |
| D | tx_initialize_low_level.S | 28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define 119 MOV r3, #SYS_MODE // Build SYS mode CPSR
|
| /ThreadX-v6.3.0/ports/cortex_a12/ac6/example_build/sample_threadx/ |
| D | tx_initialize_low_level.S | 28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define 119 MOV r3, #SYS_MODE // Build SYS mode CPSR
|
| /ThreadX-v6.3.0/ports/cortex_a12/gnu/example_build/ |
| D | tx_initialize_low_level.S | 31 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define 126 MOV r3, #SYS_MODE // Build SYS mode CPSR
|