Searched refs:MODE_MSK (Results 1 – 9 of 9) sorted by relevance
| /ThreadX-v6.3.0/ports/cortex_a9/iar/example_build/ |
| D | cstartup.s | 100 MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR label
115 BIC r0, r0, #MODE_MSK ; Clear the mode bits
122 BIC r0, r0, #MODE_MSK ; Clear the mode bits
129 BIC r0 ,r0, #MODE_MSK ; Clear the mode bits
|
| /ThreadX-v6.3.0/ports_module/cortex_a7/iar/example_build/ |
| D | cstartup.s | 100 MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR label
115 BIC r0, r0, #MODE_MSK ; Clear the mode bits
122 BIC r0, r0, #MODE_MSK ; Clear the mode bits
129 BIC r0 ,r0, #MODE_MSK ; Clear the mode bits
|
| /ThreadX-v6.3.0/ports_arch/ARMv7-A/threadx/ports/iar/example_build/ |
| D | cstartup.s | 100 MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR label
115 BIC r0, r0, #MODE_MSK ; Clear the mode bits
122 BIC r0, r0, #MODE_MSK ; Clear the mode bits
129 BIC r0 ,r0, #MODE_MSK ; Clear the mode bits
|
| /ThreadX-v6.3.0/ports/cortex_a8/iar/example_build/ |
| D | cstartup.s | 100 MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR label
115 BIC r0, r0, #MODE_MSK ; Clear the mode bits
122 BIC r0, r0, #MODE_MSK ; Clear the mode bits
129 BIC r0 ,r0, #MODE_MSK ; Clear the mode bits
|
| /ThreadX-v6.3.0/ports/cortex_a15/iar/example_build/ |
| D | cstartup.s | 100 MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR label
115 BIC r0, r0, #MODE_MSK ; Clear the mode bits
122 BIC r0, r0, #MODE_MSK ; Clear the mode bits
129 BIC r0 ,r0, #MODE_MSK ; Clear the mode bits
|
| /ThreadX-v6.3.0/ports/arm9/iar/example_build/ |
| D | cstartup.s | 100 MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR label
115 BIC r0, r0, #MODE_MSK ; Clear the mode bits
122 BIC r0, r0, #MODE_MSK ; Clear the mode bits
129 BIC r0 ,r0, #MODE_MSK ; Clear the mode bits
|
| /ThreadX-v6.3.0/ports/cortex_a7/iar/example_build/ |
| D | cstartup.s | 100 MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR label
115 BIC r0, r0, #MODE_MSK ; Clear the mode bits
122 BIC r0, r0, #MODE_MSK ; Clear the mode bits
129 BIC r0 ,r0, #MODE_MSK ; Clear the mode bits
|
| /ThreadX-v6.3.0/ports/arm11/iar/example_build/ |
| D | cstartup.s | 100 MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR label
115 BIC r0, r0, #MODE_MSK ; Clear the mode bits
122 BIC r0, r0, #MODE_MSK ; Clear the mode bits
129 BIC r0 ,r0, #MODE_MSK ; Clear the mode bits
|
| /ThreadX-v6.3.0/ports/cortex_a5/iar/example_build/ |
| D | cstartup.s | 100 MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR label
115 BIC r0, r0, #MODE_MSK ; Clear the mode bits
122 BIC r0, r0, #MODE_MSK ; Clear the mode bits
129 BIC r0 ,r0, #MODE_MSK ; Clear the mode bits
|
