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/ThreadX-v6.4.1/ports/arc_em/metaware/src/
Dtx_thread_context_restore.s168 …and r5, r4, r5 ; See if there are any other interrupts present
/ThreadX-v6.4.1/ports/arm11/gnu/example_build/
Dsample_threadx.ld181 .bss section disappears because there are no input sections. */
/ThreadX-v6.4.1/ports/cortex_a15/gnu/example_build/
Dsample_threadx.ld181 .bss section disappears because there are no input sections. */
/ThreadX-v6.4.1/ports/cortex_a17/gnu/example_build/
Dsample_threadx.ld181 .bss section disappears because there are no input sections. */
/ThreadX-v6.4.1/ports/cortex_a12/gnu/example_build/
Dsample_threadx.ld181 .bss section disappears because there are no input sections. */
/ThreadX-v6.4.1/ports_arch/ARMv7-A/threadx/ports/gnu/example_build/
Dsample_threadx.ld181 .bss section disappears because there are no input sections. */
/ThreadX-v6.4.1/ports/cortex_a8/gnu/example_build/
Dsample_threadx.ld181 .bss section disappears because there are no input sections. */
/ThreadX-v6.4.1/ports/cortex_a5/gnu/example_build/
Dsample_threadx.ld181 .bss section disappears because there are no input sections. */
/ThreadX-v6.4.1/ports/cortex_a7/gnu/example_build/
Dsample_threadx.ld181 .bss section disappears because there are no input sections. */
/ThreadX-v6.4.1/ports/cortex_r5/gnu/example_build/
Dsample_threadx.ld181 .bss section disappears because there are no input sections. */
/ThreadX-v6.4.1/ports/cortex_r4/gnu/example_build/
Dsample_threadx.ld181 .bss section disappears because there are no input sections. */
/ThreadX-v6.4.1/ports_smp/arc_hs_smp/metaware/src/
Dtx_thread_context_restore.s171 …and r5, r4, r5 ; See if there are any other interrupts present
/ThreadX-v6.4.1/ports/arc_hs/metaware/src/
Dtx_thread_context_restore.s162 …and r5, r4, r5 ; See if there are any other interrupts present
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/
Dset_gpr_boot_values.mip102 check_cps: // Determine if there is a coherency manager present. (Implementation Dependent.)
/ThreadX-v6.4.1/ports/cortex_a8/ac6/
Dreadme_threadx.txt22 Since there is no ARM Cortex-A8 FVP, there are no instructions here for running
/ThreadX-v6.4.1/ports/xtensa/xcc/
Dreadme_threadx.txt355 xtensa_timer.h (see comments there also).
450 every special register (there can be many) on every solicited context switch.
487 there are some tradeoffs in debugging. Local (".L") labels are not
494 address range explicitly between points where there is padding.
562 handler table by calling xt_set_interrupt_handler. As there is no concept of
571 mentioned because there is code to handle them in xtensa_vectors.S.
/ThreadX-v6.4.1/ports/arm11/ac5/
Dreadme_threadx.txt23 Since there is no ARM11 FVP, there are no instructions here for running
119 for every group of 32 priorities. However, there
/ThreadX-v6.4.1/utility/rtos_compatibility_layers/FreeRTOS/
Dreadme.md114 …by ThreadX namely `TX_MAX_PRIORITIES – 1`. The idle task will only run if there is a deleted threa…
175 …f `vTaskDelayUntil()` cannot perform a wait in an atomic fashion. As such there might be additiona…
/ThreadX-v6.4.1/
DREADME.md167 The main components of ThreadX RTOS are each provided in their own repository, but there are depend…
/ThreadX-v6.4.1/ports/arc_em/metaware/
Dreadme_threadx.txt195 For the system stack checking to function properly, there are two sections that must
/ThreadX-v6.4.1/utility/rtos_compatibility_layers/posix/
Dreadme_threadx_posix.txt262 there are also certain limitations with respect to some services. Below is the list of
/ThreadX-v6.4.1/ports/cortex_r5/iar/
Dreadme_threadx.txt111 for every group of 32 priorities. However, there
/ThreadX-v6.4.1/ports/cortex_r4/iar/
Dreadme_threadx.txt111 for every group of 32 priorities. However, there
/ThreadX-v6.4.1/ports/cortex_a9/gnu/
Dreadme_threadx.txt110 for every group of 32 priorities. However, there
/ThreadX-v6.4.1/ports/cortex_r4/ghs/
Dreadme_threadx.txt127 for every group of 32 priorities. However, there

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