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/ThreadX-v6.4.1/ports_module/cortex_a35/ac6/example_build/sample_threadx/
DGICv3_gicc.h166 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
168 asm("msr ICC_PMR_EL1, %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/
DGICv3_gicc.h166 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
168 asm("msr ICC_PMR_EL1, %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports/cortex_a34/ac6/example_build/sample_threadx/
DGICv3_gicc.h166 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
168 asm("msr ICC_PMR_EL1, %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports/xtensa/xcc/
Dreadme_threadx.txt384 low and medium priority interrupts that can be
527 The handlers provided for low and medium priority interrupts are just
534 The high priority interrupt handlers provided may be considered templates
539 This ThreadX port supports strict priority-based nesting of interrupts.
540 An interrupt may only nest on top of one of strictly lower priority.
541 Equal priority interrupts concurrently pending are handled in an
542 application-defined sequence before any lower priority interrupts
544 interrupt level (PS.INTLEVEL) is used to control the interrupt priority
549 bounds on interrupt latency (for a given priority) and system stack depth.
551 Software prioritization of interrupts at the same priority is controlled
[all …]
/ThreadX-v6.4.1/ports/cortex_m7/iar/example_build/
Dtx_initialize_low_level.s134 … ; Note: SVC must be lowest priority, which is 0xFF
138 … ; Note: PnSV must be lowest priority, which is 0xFF
/ThreadX-v6.4.1/ports_module/cortex_m3/iar/example_build/
Dtx_initialize_low_level.s144 … ; Note: SVC must be lowest priority, which is 0xFF
148 … ; Note: PnSV must be lowest priority, which is 0xFF
/ThreadX-v6.4.1/ports/cortex_m3/iar/example_build/
Dtx_initialize_low_level.s134 … ; Note: SVC must be lowest priority, which is 0xFF
138 … ; Note: PnSV must be lowest priority, which is 0xFF
/ThreadX-v6.4.1/ports/cortex_m4/iar/example_build/
Dtx_initialize_low_level.s134 … ; Note: SVC must be lowest priority, which is 0xFF
138 … ; Note: PnSV must be lowest priority, which is 0xFF
/ThreadX-v6.4.1/docs/
Drevision_history.txt20 … tx_mutex_get.c Changed logic to update the priority inheritance
21 priority level.
22 … tx_mutex_priority_change.c Removed update of the priority inheritance
23 priority level.
24 … tx_mutex_put.c Changed logic to properly update the priority
25 inheritance priority level.
257 and added logic to place non-priority
260 modified logic to remove non-priority
286 … at the front of the execution list at updated priority.
288 … thread for mutex cleanup, and adjusted priority restoration
[all …]
/ThreadX-v6.4.1/ports_module/cortex_a35_smp/gnu/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports_module/cortex_a35_smp/gnu/example_build/sample_threadx_module_manager/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports_arch/ARMv8-A/threadx/ports/gnu/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports_arch/ARMv8-A/threadx_smp/ports/ac6/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports_arch/ARMv8-A/threadx_smp/ports/gnu/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports_smp/cortex_a78_smp/ac6/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports_module/cortex_a35/gnu/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports_smp/cortex_a75_smp/ac6/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports_smp/cortex_a75_smp/gnu/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports_smp/cortex_a76ae_smp/gnu/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports/cortex_a75/gnu/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports/cortex_a76/ac6/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports/cortex_a76/gnu/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports_smp/cortex_a53_smp/gnu/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()
/ThreadX-v6.4.1/ports/cortex_a76ae/ac6/example_build/sample_threadx/
DGICv3_gicc.h171 static inline void setICC_PMR(uint32_t priority) in setICC_PMR() argument
173 asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); in setICC_PMR()

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