| /ThreadX-v6.2.1/ports_smp/cortex_a5x_smp/green/example_build/sample_threadx/ |
| D | tx_zynqmp_low_level.c | 42 #define GICD_ISENABLER(i) GIC_REG(0x100 + 4*(i)) argument
43 #define GICD_ICENABLER(i) GIC_REG(0x180 + 4*(i)) argument
44 #define GICD_ICPENDR(i) GIC_REG(0x280 + 4*(i)) argument
45 #define GICD_ISACTIVER(i) GIC_REG(0x300 + 4*(i)) argument
46 #define GICD_ICACTIVER(i) GIC_REG(0x380 + 4*(i)) argument
47 #define GICD_IPRIORITY(i) GIC_REG(0x400 + 4*(i)) argument
48 #define GICD_IPRIORITYB(i) *((volatile uint8_t *)(GIC_BASEADDR+0x400+(i))) argument
49 #define GICD_ITARGETSR(i) GIC_REG(0x800 + 4*(i)) argument
50 #define GICD_ITARGETSRB(i) *((volatile uint8_t *)(GIC_BASEADDR+0x800+(i))) argument
51 #define GICD_ICFGR(i) GIC_REG(0xc00 + 4*(i)) argument
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| /ThreadX-v6.2.1/ports/xtensa/xcc/src/ |
| D | xtensa_intr_asm.S | 126 .set i, 0 define
130 .set i, i+1 define
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| D | tx_initialize_low_level.c | 85 int32_t i; in _tx_initialize_low_level() local
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| D | xtensa_coproc_handler.S | 69 .set i, 0 define
73 .set i, i+1 define
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| /ThreadX-v6.2.1/utility/rtos_compatibility_layers/posix/ |
| D | px_mq_queue_init.c | 71 ULONG i; in posix_queue_init() local
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| D | px_sem_get_new_sem.c | 71 ULONG i; in posix_get_new_sem() local
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| D | px_mq_get_new_queue.c | 72 ULONG i; in posix_get_new_queue() local
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| /ThreadX-v6.2.1/ports_module/cortex_a7/ac5/module_manager/src/ |
| D | txm_module_manager_external_memory_enable.c | 78 UINT i; in _txm_level2_page_get() local
171 UINT i; in _txm_level2_page_clear() local
249 UINT i; in _txm_module_manager_external_memory_enable() local
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| D | txm_module_manager_mm_register_setup.c | 131 UINT i = 1; in _txm_module_manager_assign_asid() local
251 UINT i; in _txm_module_manager_mm_register_setup() local
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| /ThreadX-v6.2.1/ports_module/cortex_a7/gnu/module_manager/src/ |
| D | txm_module_manager_external_memory_enable.c | 78 UINT i; in _txm_level2_page_get() local
171 UINT i; in _txm_level2_page_clear() local
249 UINT i; in _txm_module_manager_external_memory_enable() local
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| D | txm_module_manager_mm_register_setup.c | 131 UINT i = 1; in _txm_module_manager_assign_asid() local
251 UINT i; in _txm_module_manager_mm_register_setup() local
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| /ThreadX-v6.2.1/ports_module/cortex_a7/iar/module_manager/src/ |
| D | txm_module_manager_external_memory_enable.c | 78 UINT i; in _txm_level2_page_get() local
171 UINT i; in _txm_level2_page_clear() local
249 UINT i; in _txm_module_manager_external_memory_enable() local
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| D | txm_module_manager_mm_register_setup.c | 131 UINT i = 1; in _txm_module_manager_assign_asid() local
251 UINT i; in _txm_module_manager_mm_register_setup() local
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| /ThreadX-v6.2.1/common_smp/src/ |
| D | tx_thread_smp_current_state_set.c | 76 UINT i; in _tx_thread_smp_current_state_set() local
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| D | tx_trace_object_unregister.c | 77 UINT i, entries; in _tx_trace_object_unregister() local
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| D | tx_initialize_kernel_enter.c | 96 ULONG other_core_status, i; in _tx_initialize_kernel_enter() local
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| /ThreadX-v6.2.1/common/src/ |
| D | tx_trace_object_unregister.c | 77 UINT i, entries; in _tx_trace_object_unregister() local
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| D | txe_event_flags_create.c | 87 ULONG i; in _txe_event_flags_create() local
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| /ThreadX-v6.2.1/ports_smp/linux/gnu/src/ |
| D | tx_thread_smp_core_get.c | 78 UINT i; in _tx_thread_smp_core_get() local
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| D | tx_thread_smp_current_state_get.c | 78 UINT i; in _tx_thread_smp_current_state_get() local
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| D | tx_thread_smp_current_thread_get.c | 77 UINT i; in _tx_thread_smp_current_thread_get() local
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| /ThreadX-v6.2.1/utility/low_power/ |
| D | tx_low_power.c | 294 UINT i; in tx_timer_get_next() local
417 UINT i; in tx_time_increment() local
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| /ThreadX-v6.2.1/ports_module/rxv2/iar/example_build/ |
| D | hwsetup.c | 87 volatile unsigned int i; in operating_frequency_set() local
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| /ThreadX-v6.2.1/ports/c667x/ccs/example_build/include/ |
| D | C66XX_MACROS.hxx | 90 #define C66XX_get_core_evtflag_rg_addr(i) (C66XX_CORE_EVTFLAG_RG_BADDR + i * C66XX_CORE_EVTFLAG… argument
91 #define C66XX_get_core_evtflag_rg(i) C66XX_GET_RG_VALUE(C66XX_get_core_evtflag_rg_addr(i)) argument
93 #define C66XX_get_core_evtset_rg_addr(i) (C66XX_CORE_EVTSET_RG_BADDR + i * C66XX_CORE_EVTSET_RG… argument
94 #define C66XX_set_core_evtset_rg(i, v) C66XX_SET_RG_VALUE(C66XX_get_core_evtset_rg_addr(i), v) argument
96 #define C66XX_get_core_evtclr_rg_addr(i) (C66XX_CORE_EVTCLR_RG_BADDR + i * C66XX_CORE_EVTCLR_RG… argument
97 #define C66XX_set_core_evtclr_rg(i, v) C66XX_SET_RG_VALUE(C66XX_get_core_evtclr_rg_addr(i), v) argument
99 #define C66XX_get_core_evtmask_rg_addr(i) (C66XX_CORE_EVTMASK_RG_BADDR + i * C66XX_CORE_EVTMASK… argument
100 #define C66XX_get_core_evtmask_rg(i) C66XX_GET_RG_VALUE(C66XX_get_core_evtmask_rg_addr(i)) argument
101 #define C66XX_set_core_evtmask_rg(i, v) C66XX_SET_RG_VALUE(C66XX_get_core_evtmask_rg_addr(i), … argument
106 #define C66XX_get_core_event_id_rg(i) (i / 32) argument
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| /ThreadX-v6.2.1/ports/cortex_r5/ghs/src/ |
| D | txr_ghs.c | 68 int i; in __stkchk() local
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