Searched refs:UX_DATA_MEMORY_BARRIER (Results 1 – 9 of 9) sorted by relevance
| /USBX-v6.3.0/common/usbx_host_controllers/src/ |
| D | ux_hcd_ehci_request_interrupt_transfer.c | 124 UX_DATA_MEMORY_BARRIER in _ux_hcd_ehci_request_interrupt_transfer()
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| D | ux_hcd_ehci_request_bulk_transfer.c | 160 UX_DATA_MEMORY_BARRIER in _ux_hcd_ehci_request_bulk_transfer()
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| D | ux_hcd_ehci_request_control_transfer.c | 210 UX_DATA_MEMORY_BARRIER in _ux_hcd_ehci_request_control_transfer()
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| D | ux_hcd_ehci_hsisochronous_tds_process.c | 449 UX_DATA_MEMORY_BARRIER in _ux_hcd_ehci_hsisochronous_tds_process()
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| /USBX-v6.3.0/ports/arm9/gnu/inc/ |
| D | ux_port.h | 249 #define UX_DATA_MEMORY_BARRIER __asm__ __volatile__("MCR p15, 0, r0, c7, c10, 4"); macro
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| /USBX-v6.3.0/ports/cortex_a7/gnu/inc/ |
| D | ux_port.h | 256 #define UX_DATA_MEMORY_BARRIER __asm__ __volatile__("DMB"); macro
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| /USBX-v6.3.0/ports/cortex_a7/iar/inc/ |
| D | ux_port.h | 256 #define UX_DATA_MEMORY_BARRIER __asm volatile("DMB"); macro
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| /USBX-v6.3.0/ports/arm9/iar/inc/ |
| D | ux_port.h | 256 #define UX_DATA_MEMORY_BARRIER __asm volatile("MCR p15, 0, r0, c7, c10, 4"); macro
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| /USBX-v6.3.0/common/core/inc/ |
| D | ux_api.h | 243 #ifndef UX_DATA_MEMORY_BARRIER
244 #define UX_DATA_MEMORY_BARRIER macro
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