1 /**************************************************************************/ 2 /* */ 3 /* Copyright (c) Microsoft Corporation. All rights reserved. */ 4 /* */ 5 /* This software is licensed under the Microsoft Software License */ 6 /* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7 /* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8 /* and in the root directory of this software. */ 9 /* */ 10 /**************************************************************************/ 11 12 13 /**************************************************************************/ 14 /**************************************************************************/ 15 /** */ 16 /** USBX Component */ 17 /** */ 18 /** ASIX Class */ 19 /** */ 20 /**************************************************************************/ 21 /**************************************************************************/ 22 23 24 /**************************************************************************/ 25 /* */ 26 /* COMPONENT DEFINITION RELEASE */ 27 /* */ 28 /* ux_host_class_asix.h PORTABLE C */ 29 /* 6.2.0 */ 30 /* AUTHOR */ 31 /* */ 32 /* Chaoqiong Xiao, Microsoft Corporation */ 33 /* */ 34 /* DESCRIPTION */ 35 /* */ 36 /* This file contains all the header and extern functions used by the */ 37 /* USBX ASIX class. */ 38 /* */ 39 /* RELEASE HISTORY */ 40 /* */ 41 /* DATE NAME DESCRIPTION */ 42 /* */ 43 /* 05-19-2020 Chaoqiong Xiao Initial Version 6.0 */ 44 /* 09-30-2020 Chaoqiong Xiao Modified comment(s), */ 45 /* used UX prefix to refer to */ 46 /* TX symbols instead of using */ 47 /* them directly, */ 48 /* resulting in version 6.1 */ 49 /* 08-02-2021 Wen Wang Modified comment(s), */ 50 /* added extern "C" keyword */ 51 /* for compatibility with C++, */ 52 /* resulting in version 6.1.8 */ 53 /* 04-25-2022 Chaoqiong Xiao Modified comment(s), */ 54 /* fixed standalone compile, */ 55 /* resulting in version 6.1.11 */ 56 /* 10-31-2022 Chaoqiong Xiao Modified comment(s), */ 57 /* supported NX packet chain, */ 58 /* refined VID/PID check flow, */ 59 /* removed internal NX pool, */ 60 /* added some new definitions, */ 61 /* refined reception handling, */ 62 /* resulting in version 6.2.0 */ 63 /* */ 64 /**************************************************************************/ 65 66 #ifndef UX_HOST_CLASS_ASIX_H 67 #define UX_HOST_CLASS_ASIX_H 68 69 /* Determine if a C++ compiler is being used. If so, ensure that standard 70 C is used to process the API information. */ 71 72 #ifdef __cplusplus 73 74 /* Yes, C++ compiler is present. Use standard C. */ 75 extern "C" { 76 77 #endif 78 79 80 #if !defined(UX_HOST_STANDALONE) 81 #include "nx_api.h" 82 #include "ux_network_driver.h" 83 #else 84 85 /* Assume NX things for compiling. */ 86 #define NX_PACKET VOID* 87 #define NX_PACKET_POOL VOID* 88 #endif 89 90 /* Define to check if NetX preserved header size is compatible with ASIX. */ 91 /* #define UX_HOST_CLASS_ASIX_HEADER_CHECK_ENABLE */ 92 93 94 /* Define ASIX Class constants. Insert here the PID/VID of vendors and products using the Asix chipset. */ 95 #ifndef UX_HOST_CLASS_ASIX_VENDOR_ID 96 #define UX_HOST_CLASS_ASIX_VENDOR_ID 0X2001 97 #define UX_HOST_CLASS_ASIX_PRODUCT_ID 0X3C05 98 #endif 99 100 #define UX_HOST_CLASS_ASIX_VENDOR_FUJIEI_ID 0X0B95 101 #define UX_HOST_CLASS_ASIX_PRODUCT_FUJIEI_ID 0X772B 102 103 #define UX_HOST_CLASS_ASIX_VENDOR_LINKSYS_ID 0X13B1 104 #define UX_HOST_CLASS_ASIX_PRODUCT_LINKSYS_ID 0X0018 105 106 /* Define ASIX supported VID and PID array (of 16-bits). */ 107 #ifndef UX_HOST_CLASS_ASIX_VID_PID_ARRAY 108 #define UX_HOST_CLASS_ASIX_VID_PID_ARRAY \ 109 UX_HOST_CLASS_ASIX_VENDOR_ID, UX_HOST_CLASS_ASIX_PRODUCT_ID, \ 110 UX_HOST_CLASS_ASIX_VENDOR_FUJIEI_ID, UX_HOST_CLASS_ASIX_PRODUCT_FUJIEI_ID, \ 111 UX_HOST_CLASS_ASIX_VENDOR_LINKSYS_ID, UX_HOST_CLASS_ASIX_PRODUCT_LINKSYS_ID 112 #endif 113 114 #define UX_HOST_CLASS_ASIX_SPEED_SELECTED_100MPBS 0x100 115 #define UX_HOST_CLASS_ASIX_SPEED_SELECTED_10MPBS 0x10 116 #define UX_HOST_CLASS_ASIX_LINK_STATE_DOWN 0 117 #define UX_HOST_CLASS_ASIX_LINK_STATE_UP 1 118 #define UX_HOST_CLASS_ASIX_LINK_STATE_PENDING_UP 2 119 #define UX_HOST_CLASS_ASIX_LINK_STATE_PENDING_DOWN 3 120 #define UX_HOST_CLASS_ASIX_BASE_IP_ADDRESS 0xC0A80001 121 #define UX_HOST_CLASS_ASIX_BASE_IP_MASK 0xFFFFFF00 122 #define UX_HOST_CLASS_ASIX_MAX_MTU 1518 123 #define UX_HOST_CLASS_ASIX_ETHERNET_IP 0x0800 124 #define UX_HOST_CLASS_ASIX_ETHERNET_ARP 0x0806 125 #define UX_HOST_CLASS_ASIX_ETHERNET_RARP 0x8035 126 #define UX_HOST_CLASS_ASIX_ETHERNET_PACKET_SIZE 1536 127 #define UX_HOST_CLASS_ASIX_NX_ALIGN_PADDING 2 128 #define UX_HOST_CLASS_ASIX_RX_HEADER_SIZE 4 129 #define UX_HOST_CLASS_ASIX_OVERHEAD_SIZE (UX_HOST_CLASS_ASIX_NX_ALIGN_PADDING + UX_HOST_CLASS_ASIX_RX_HEADER_SIZE) 130 131 #define UX_HOST_CLASS_ASIX_TRANSMIT_BUFFER_SIZE UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE 132 133 #ifndef UX_HOST_CLASS_ASIX_RECEIVE_BUFFER_SIZE 134 #define UX_HOST_CLASS_ASIX_RECEIVE_BUFFER_SIZE 512 /* N*512. */ 135 #endif 136 137 #ifdef NX_DISABLE_PACKET_CHAIN 138 #undef UX_HOST_CLASS_ASIX_PACKET_CHAIN_SUPPORT 139 #else 140 #define UX_HOST_CLASS_ASIX_PACKET_CHAIN_SUPPORT 141 #endif 142 143 #define UX_HOST_CLASS_ASIX_NX_PACKET_SIZE sizeof(NX_PACKET) 144 145 #define UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE_ASSERT \ 146 UX_COMPILE_TIME_ASSERT(!UX_OVERFLOW_CHECK_ADD_ULONG( \ 147 UX_HOST_CLASS_ASIX_ETHERNET_PACKET_SIZE, \ 148 UX_HOST_CLASS_ASIX_OVERHEAD_SIZE), \ 149 UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE_calc_ovf) 150 #define UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE (UX_HOST_CLASS_ASIX_ETHERNET_PACKET_SIZE + UX_HOST_CLASS_ASIX_OVERHEAD_SIZE) 151 152 #define UX_HOST_CLASS_ASIX_NX_BUFF_SIZE_ASSERT \ 153 UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE_ASSERT \ 154 UX_COMPILE_TIME_ASSERT(!UX_OVERFLOW_CHECK_ADD_ULONG( \ 155 UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE, \ 156 UX_HOST_CLASS_ASIX_NX_PACKET_SIZE), \ 157 UX_HOST_CLASS_ASIX_NX_BUFF_SIZE_calc_ovf) 158 #define UX_HOST_CLASS_ASIX_NX_BUFF_SIZE (UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE + UX_HOST_CLASS_ASIX_NX_PACKET_SIZE) 159 160 #define UX_HOST_CLASS_ASIX_ETHERNET_SIZE 14 161 162 #define UX_HOST_CLASS_ASIX_DEVICE_INIT_DELAY (1 * UX_PERIODIC_RATE) 163 #define UX_HOST_CLASS_ASIX_CLASS_TRANSFER_TIMEOUT 300000 164 #define UX_HOST_CLASS_ASIX_SETUP_BUFFER_SIZE 16 165 166 #define UX_HOST_CLASS_ASIX_PACKET_POOL_WAIT 100 167 #define UX_HOST_CLASS_ASIX_PACKET_ALLOCATE_WAIT 2000 168 169 /* Define NetX errors inside the Asix class. */ 170 #define UX_HOST_CLASS_ASIX_NX_SUCCESS 0x00 171 #define UX_HOST_CLASS_ASIX_NX_NO_PACKET 0x01 172 #define UX_HOST_CLASS_ASIX_NX_UNDERFLOW 0x02 173 #define UX_HOST_CLASS_ASIX_NX_OVERFLOW 0x03 174 #define UX_HOST_CLASS_ASIX_NX_NO_MAPPING 0x04 175 #define UX_HOST_CLASS_ASIX_NX_DELETED 0x05 176 #define UX_HOST_CLASS_ASIX_NX_POOL_ERROR 0x06 177 #define UX_HOST_CLASS_ASIX_NX_PTR_ERROR 0x07 178 #define UX_HOST_CLASS_ASIX_NX_WAIT_ERROR 0x08 179 #define UX_HOST_CLASS_ASIX_NX_SIZE_ERROR 0x09 180 #define UX_HOST_CLASS_ASIX_NX_OPTION_ERROR 0x0a 181 #define UX_HOST_CLASS_ASIX_NX_DELETE_ERROR 0x10 182 #define UX_HOST_CLASS_ASIX_NX_CALLER_ERROR 0x11 183 #define UX_HOST_CLASS_ASIX_NX_INVALID_PACKET 0x12 184 #define UX_HOST_CLASS_ASIX_NX_INVALID_SOCKET 0x13 185 #define UX_HOST_CLASS_ASIX_NX_NOT_ENABLED 0x14 186 #define UX_HOST_CLASS_ASIX_NX_ALREADY_ENABLED 0x15 187 #define UX_HOST_CLASS_ASIX_NX_ENTRY_NOT_FOUND 0x16 188 #define UX_HOST_CLASS_ASIX_NX_NO_MORE_ENTRIES 0x17 189 #define UX_HOST_CLASS_ASIX_NX_ARP_TIMER_ERROR 0x18 190 #define UX_HOST_CLASS_ASIX_NX_RESERVED_CODE0 0x19 191 #define UX_HOST_CLASS_ASIX_NX_WAIT_ABORTED 0x1A 192 #define UX_HOST_CLASS_ASIX_NX_IP_INTERNAL_ERROR 0x20 193 #define UX_HOST_CLASS_ASIX_NX_IP_ADDRESS_ERROR 0x21 194 #define UX_HOST_CLASS_ASIX_NX_ALREADY_BOUND 0x22 195 #define UX_HOST_CLASS_ASIX_NX_PORT_UNAVAILABLE 0x23 196 #define UX_HOST_CLASS_ASIX_NX_NOT_BOUND 0x24 197 #define UX_HOST_CLASS_ASIX_NX_RESERVED_CODE1 0x25 198 #define UX_HOST_CLASS_ASIX_NX_SOCKET_UNBOUND 0x26 199 #define UX_HOST_CLASS_ASIX_NX_NOT_CREATED 0x27 200 #define UX_HOST_CLASS_ASIX_NX_SOCKETS_BOUND 0x28 201 #define UX_HOST_CLASS_ASIX_NX_NO_RESPONSE 0x29 202 #define UX_HOST_CLASS_ASIX_NX_POOL_DELETED 0x30 203 #define UX_HOST_CLASS_ASIX_NX_ALREADY_RELEASED 0x31 204 #define UX_HOST_CLASS_ASIX_NX_RESERVED_CODE2 0x32 205 #define UX_HOST_CLASS_ASIX_NX_MAX_LISTEN 0x33 206 #define UX_HOST_CLASS_ASIX_NX_DUPLICATE_LISTEN 0x34 207 #define UX_HOST_CLASS_ASIX_NX_NOT_CLOSED 0x35 208 #define UX_HOST_CLASS_ASIX_NX_NOT_LISTEN_STATE 0x36 209 #define UX_HOST_CLASS_ASIX_NX_IN_PROGRESS 0x37 210 #define UX_HOST_CLASS_ASIX_NX_NOT_CONNECTED 0x38 211 #define UX_HOST_CLASS_ASIX_NX_WINDOW_OVERFLOW 0x39 212 #define UX_HOST_CLASS_ASIX_NX_ALREADY_SUSPENDED 0x40 213 #define UX_HOST_CLASS_ASIX_NX_DISCONNECT_FAILED 0x41 214 #define UX_HOST_CLASS_ASIX_NX_STILL_BOUND 0x42 215 #define UX_HOST_CLASS_ASIX_NX_NOT_SUCCESSFUL 0x43 216 #define UX_HOST_CLASS_ASIX_NX_UNHANDLED_COMMAND 0x44 217 #define UX_HOST_CLASS_ASIX_NX_NO_FREE_PORTS 0x45 218 #define UX_HOST_CLASS_ASIX_NX_INVALID_PORT 0x46 219 #define UX_HOST_CLASS_ASIX_NX_INVALID_RELISTEN 0x47 220 #define UX_HOST_CLASS_ASIX_NX_CONNECTION_PENDING 0x48 221 #define UX_HOST_CLASS_ASIX_NX_TX_QUEUE_DEPTH 0x49 222 #define UX_HOST_CLASS_ASIX_NX_NOT_IMPLEMENTED 0x80 223 224 225 226 /* Define ASIX command request values. */ 227 228 #define UX_HOST_CLASS_ASIX_REQ_RX_TX_SRAM_REG_READ 0x02 229 #define UX_HOST_CLASS_ASIX_REQ_RX_TX_SRAM_REG_WRITE 0x03 230 #define UX_HOST_CLASS_ASIX_REQ_OWN_SMI 0x06 231 #define UX_HOST_CLASS_ASIX_REQ_READ_PHY_REG 0x07 232 #define UX_HOST_CLASS_ASIX_REQ_WRITE_PHY_REG 0x08 233 #define UX_HOST_CLASS_ASIX_REQ_READ_STATION_STATUS 0x09 234 #define UX_HOST_CLASS_ASIX_REQ_WHO_OWNS_SMI 0x09 235 #define UX_HOST_CLASS_ASIX_REQ_RELEASE_SMI 0x0a 236 #define UX_HOST_CLASS_ASIX_REQ_READ_SROM 0x0b 237 #define UX_HOST_CLASS_ASIX_REQ_WRITE_SROM 0x0c 238 #define UX_HOST_CLASS_ASIX_REQ_WRITE_SROM_EN 0x0d 239 #define UX_HOST_CLASS_ASIX_REQ_WRITE_SROM_DIS 0x0e 240 #define UX_HOST_CLASS_ASIX_REQ_READ_RX_CTL 0x0f 241 #define UX_HOST_CLASS_ASIX_REQ_WRITE_RX_CTL 0x10 242 #define UX_HOST_CLASS_ASIX_REQ_READ_IPG012 0x11 243 #define UX_HOST_CLASS_ASIX_REQ_WRITE_IPG012 0x12 244 #define UX_HOST_CLASS_ASIX_REQ_READ_NODE_ID 0x13 245 #define UX_HOST_CLASS_ASIX_REQ_WRITE_NODE_ID 0x14 246 #define UX_HOST_CLASS_ASIX_REQ_WRITE_MULTICAST_FILTER 0x16 247 #define UX_HOST_CLASS_ASIX_REQ_TEST_REGISTER 0x17 248 #define UX_HOST_CLASS_ASIX_REQ_READ_PHY_ID 0x19 249 #define UX_HOST_CLASS_ASIX_REQ_READ_MEDIUM_STATUS 0x1a 250 #define UX_HOST_CLASS_ASIX_REQ_WRITE_MEDIUM_MODE 0x1b 251 #define UX_HOST_CLASS_ASIX_REQ_READ_MONITOR_MODE_STATUS 0x1c 252 #define UX_HOST_CLASS_ASIX_REQ_WRITE_MONITOR_MODE_STATUS 0x1d 253 #define UX_HOST_CLASS_ASIX_REQ_READ_GPIO_STATUS 0x1e 254 #define UX_HOST_CLASS_ASIX_REQ_WRITE_GPIO_STATUS 0x1f 255 #define UX_HOST_CLASS_ASIX_REQ_SW_RESET 0x20 256 #define UX_HOST_CLASS_ASIX_REQ_READ_SW_PHY_SELECT_STATUS 0x21 257 #define UX_HOST_CLASS_ASIX_REQ_WRITE_SW_PHY_SELECT_STATUS 0x22 258 259 /* Define ASIX Interrupt Packet format. */ 260 261 #define UX_HOST_CLASS_ASIX_INTERRUPT_SIGNATURE_VALUE 0xA1 262 #define UX_HOST_CLASS_ASIX_INTERRUPT_SIGNATURE_OFFSET 0x00 263 #define UX_HOST_CLASS_ASIX_INTERRUPT_STATE_OFFSET 0x02 264 #define UX_HOST_CLASS_ASIX_INTERRUPT_STATE_PPLS 0x01 265 #define UX_HOST_CLASS_ASIX_INTERRUPT_STATE_SPLS 0x02 266 #define UX_HOST_CLASS_ASIX_INTERRUPT_STATE_FLE 0x04 267 #define UX_HOST_CLASS_ASIX_INTERRUPT_STATE_MDINT 0x08 268 #define UX_HOST_CLASS_ASIX_INTERRUPT_PHY_REG_VALUE_OFFSET 0x05 269 270 /* Define ASIX Class PHY ID Packet format. */ 271 272 #define UX_HOST_CLASS_ASIX_PHY_ID_SECONDARY 0x00 273 #define UX_HOST_CLASS_ASIX_PHY_ID_PRIMARY 0x01 274 #define UX_HOST_CLASS_ASIX_PHY_ID_MASK 0x01f 275 #define UX_HOST_CLASS_ASIX_PHY_TYPE_SHIFT 0x05 276 #define UX_HOST_CLASS_ASIX_PHY_TYPE_MASK 0x07 277 278 /* Define ASIX Class GPIO Register. */ 279 280 #define UX_HOST_CLASS_ASIX_GPIO_GPO0EN 0x01 281 #define UX_HOST_CLASS_ASIX_GPIO_GPO_0 0x02 282 #define UX_HOST_CLASS_ASIX_GPIO_GPO1EN 0x04 283 #define UX_HOST_CLASS_ASIX_GPIO_GPO_1 0x08 284 #define UX_HOST_CLASS_ASIX_GPIO_GPO2EN 0x10 285 #define UX_HOST_CLASS_ASIX_GPIO_GPO_2 0x20 286 #define UX_HOST_CLASS_ASIX_GPIO_RSE 0x80 287 288 /* Define ASIX Class Software reset Register. */ 289 290 #define UX_HOST_CLASS_ASIX_SW_RESET_RR 0x01 291 #define UX_HOST_CLASS_ASIX_SW_RESET_RT 0x02 292 #define UX_HOST_CLASS_ASIX_SW_RESET_PRTE 0x04 293 #define UX_HOST_CLASS_ASIX_SW_RESET_PRL 0x08 294 #define UX_HOST_CLASS_ASIX_SW_RESET_BZ 0x10 295 #define UX_HOST_CLASS_ASIX_SW_RESET_IPRL 0x20 296 #define UX_HOST_CLASS_ASIX_SW_RESET_IPPD 0x40 297 298 /* Define ASIX Class Receive Control Register. */ 299 300 #define UX_HOST_CLASS_ASIX_RXCR_PRO 0x0001 301 #define UX_HOST_CLASS_ASIX_RXCR_AMALL 0x0002 302 #define UX_HOST_CLASS_ASIX_RXCR_SEP 0x0004 303 #define UX_HOST_CLASS_ASIX_RXCR_AB 0x0008 304 #define UX_HOST_CLASS_ASIX_RXCR_AM 0x0010 305 #define UX_HOST_CLASS_ASIX_RXCR_AP 0x0020 306 #define UX_HOST_CLASS_ASIX_RXCR_SO 0x0080 307 308 /* 88772. */ 309 #define UX_HOST_CLASS_ASIX_RXCR_MFB_2048 0x0000 310 #define UX_HOST_CLASS_ASIX_RXCR_MFB_4096 0x0100 311 #define UX_HOST_CLASS_ASIX_RXCR_MFB_8192 0x0200 312 #define UX_HOST_CLASS_ASIX_RXCR_MFB_16384 0x0300 /* Default. */ 313 314 /* 88772B. */ 315 #define UX_HOST_CLASS_ASIX_RXCR_RH1M 0x0100 /* Default 1. */ 316 #define UX_HOST_CLASS_ASIX_RXCR_RH2M 0x0200 /* Default 0. */ 317 #define UX_HOST_CLASS_ASIX_RXCR_RH3M 0x0400 /* Default 0. */ 318 319 320 /* Define ASIX Class packet equivalences. */ 321 322 #define UX_HOST_CLASS_ASIX_PACKET_SIZE 128 323 #define UX_HOST_CLASS_ASIX_NODE_ID_LENGTH 6 324 325 #define UX_HOST_CLASS_ASIX_RX_PACKET_LENGTH_MASK 0xFFF 326 327 /* Define ASIX PHY registers description. */ 328 329 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR 0x00 330 #define UX_HOST_CLASS_ASIX_PHY_REG_BMSR 0x01 331 #define UX_HOST_CLASS_ASIX_PHY_REG_PHYIDR1 0x02 332 #define UX_HOST_CLASS_ASIX_PHY_REG_PHYIDR2 0x03 333 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR 0x04 334 #define UX_HOST_CLASS_ASIX_PHY_REG_ANLPAR 0x05 335 #define UX_HOST_CLASS_ASIX_PHY_REG_ANER 0x06 336 337 /* Define ASIX PHY BMCR registers description. */ 338 339 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_RESET 0x8000 340 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_LOOPBACK_ENABLED 0x4000 341 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_SPEED_100MBS 0x2000 342 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_SPEED_10MBS 0x0000 343 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_AUTO_NEGOTIATION 0x1000 344 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_POWER_DOWN 0x0800 345 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_ISOLATE 0x0400 346 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_RESTART_NEG 0x0200 347 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_DUPLEX_MODE 0x0100 348 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_COLLISION_TEST 0x0080 349 350 351 /* Define ASIX PHY PHYIDR1 register description. */ 352 353 #define UX_HOST_CLASS_ASIX_PHY_REG_PHYIDR1_MDL_REV_SHIFT 0x00 354 #define UX_HOST_CLASS_ASIX_PHY_REG_PHYIDR1_MDL_REV_MASK 0x0f 355 #define UX_HOST_CLASS_ASIX_PHY_REG_PHYIDR1_VNDR_REV_SHIFT 0x04 356 #define UX_HOST_CLASS_ASIX_PHY_REG_PHYIDR1_VNDR_REV_MASK 0x2f 357 358 359 /* Define ASIX PHY ANAR register description. */ 360 361 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_DEFAULT_SELECTOR 0x0001 362 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_10_HD 0x0020 363 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_10_FD 0x0040 364 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_TX_HD 0x0080 365 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_TX_FD 0x0100 366 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_T4 0x0200 367 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_PAUSE 0x0400 368 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_RF 0x1000 369 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_ACK 0x2000 370 371 /* Define ASIX MEDIUM register description. */ 372 373 #define UX_HOST_CLASS_ASIX_MEDIUM_FD 0x0002 374 #define UX_HOST_CLASS_ASIX_MEDIUM_BIT2 0x0004 375 #define UX_HOST_CLASS_ASIX_MEDIUM_BIT3 0x0000 376 #define UX_HOST_CLASS_ASIX_MEDIUM_RFC_ENABLED 0x0010 377 #define UX_HOST_CLASS_ASIX_MEDIUM_TFC_ENABLED 0x0020 378 379 #define UX_HOST_CLASS_ASIX_MEDIUM_RE_ENABLED 0x0100 380 #define UX_HOST_CLASS_ASIX_MEDIUM_PS 0x0200 381 #define UX_HOST_CLASS_ASIX_MEDIUM_SBP 0x0800 382 #define UX_HOST_CLASS_ASIX_MEDIUM_SM 0x1000 383 384 /* Define ASIX IPG default values register description. */ 385 386 #define UX_HOST_CLASS_ASIX_PPG0_IPG1 0x0C15 387 #define UX_HOST_CLASS_ASIX_PPG2 0x000E 388 389 /* Define ASIX Reception States. */ 390 391 #define UX_HOST_CLASS_ASIX_RECEPTION_STATE_STOPPED 0 392 #define UX_HOST_CLASS_ASIX_RECEPTION_STATE_STARTED 1 393 #define UX_HOST_CLASS_ASIX_RECEPTION_STATE_IN_TRANSFER 2 394 395 396 /* Define ASIX Class instance structure. */ 397 398 typedef struct UX_HOST_CLASS_ASIX_STRUCT 399 { 400 struct UX_HOST_CLASS_ASIX_STRUCT 401 *ux_host_class_asix_next_instance; 402 UX_HOST_CLASS *ux_host_class_asix_class; 403 UX_DEVICE *ux_host_class_asix_device; 404 UX_ENDPOINT *ux_host_class_asix_bulk_in_endpoint; 405 UX_ENDPOINT *ux_host_class_asix_bulk_out_endpoint; 406 UX_ENDPOINT *ux_host_class_asix_interrupt_endpoint; 407 UX_INTERFACE *ux_host_class_asix_interface; 408 UINT ux_host_class_asix_instance_status; 409 UINT ux_host_class_asix_state; 410 411 UX_SEMAPHORE ux_host_class_asix_semaphore; 412 UX_SEMAPHORE ux_host_class_asix_interrupt_notification_semaphore; 413 UX_THREAD ux_host_class_asix_thread; 414 415 UCHAR *ux_host_class_asix_thread_stack; 416 ULONG ux_host_class_asix_notification_count; 417 ULONG ux_host_class_asix_primary_phy_id; 418 ULONG ux_host_class_asix_primary_phy_type; 419 ULONG ux_host_class_asix_secondary_phy_id; 420 ULONG ux_host_class_asix_secondary_phy_type; 421 ULONG ux_host_class_asix_model_revision_number; 422 ULONG ux_host_class_asix_vendor_model_number; 423 ULONG ux_host_class_asix_speed_selected; 424 ULONG ux_host_class_asix_device_state; 425 ULONG ux_host_class_asix_link_state; 426 427 NX_PACKET *ux_host_class_asix_xmit_queue; 428 #ifdef UX_HOST_CLASS_ASIX_PACKET_CHAIN_SUPPORT 429 UCHAR *ux_host_class_asix_xmit_buffer; 430 #endif 431 NX_PACKET *ux_host_class_asix_receive_queue; 432 UCHAR *ux_host_class_asix_receive_buffer; 433 NX_PACKET_POOL *ux_host_class_asix_packet_pool; 434 ULONG ux_host_class_asix_packet_available_min; 435 436 UCHAR ux_host_class_asix_node_id[UX_HOST_CLASS_ASIX_NODE_ID_LENGTH]; 437 VOID (*ux_host_class_asix_device_status_change_callback)(struct UX_HOST_CLASS_ASIX_STRUCT *asix, 438 ULONG device_state); 439 VOID *ux_host_class_asix_network_handle; 440 441 } UX_HOST_CLASS_ASIX; 442 443 444 /* Define ASIX reception structure. */ 445 446 typedef struct UX_HOST_CLASS_ASIX_RECEPTION_STRUCT 447 { 448 449 ULONG ux_host_class_asix_reception_state; 450 ULONG ux_host_class_asix_reception_block_size; 451 UCHAR *ux_host_class_asix_reception_data_buffer; 452 ULONG ux_host_class_asix_reception_data_buffer_size; 453 UCHAR *ux_host_class_asix_reception_data_head; 454 UCHAR *ux_host_class_asix_reception_data_tail; 455 VOID (*ux_host_class_asix_reception_callback)(struct UX_HOST_CLASS_ASIX_STRUCT *asix, 456 UINT status, 457 UCHAR *reception_buffer, 458 ULONG reception_size); 459 460 } UX_HOST_CLASS_ASIX_RECEPTION; 461 462 /* Define Asix Class function prototypes. */ 463 464 UINT _ux_host_class_asix_activate(UX_HOST_CLASS_COMMAND *command); 465 UINT _ux_host_class_asix_configure(UX_HOST_CLASS_ASIX *asix); 466 UINT _ux_host_class_asix_deactivate(UX_HOST_CLASS_COMMAND *command); 467 UINT _ux_host_class_asix_endpoints_get(UX_HOST_CLASS_ASIX *asix); 468 UINT _ux_host_class_asix_entry(UX_HOST_CLASS_COMMAND *command); 469 UINT _ux_host_class_asix_read (UX_HOST_CLASS_ASIX *asix, UCHAR *data_pointer, 470 ULONG requested_length, ULONG *actual_length); 471 UINT _ux_host_class_asix_write(VOID *asix_class, NX_PACKET *packet); 472 VOID _ux_host_class_asix_interrupt_notification(UX_TRANSFER *transfer_request); 473 VOID _ux_host_class_asix_reception_callback (UX_TRANSFER *transfer_request); 474 VOID _ux_host_class_asix_thread(ULONG parameter); 475 VOID _ux_host_class_asix_transmission_callback (UX_TRANSFER *transfer_request); 476 UINT _ux_host_class_asix_setup(UX_HOST_CLASS_ASIX *asix); 477 478 /* Define Asix Class API prototypes. */ 479 480 #define ux_host_class_asix_entry _ux_host_class_asix_entry 481 #define ux_host_class_asix_read _ux_host_class_asix_read 482 #define ux_host_class_asix_write _ux_host_class_asix_write 483 484 /* Determine if a C++ compiler is being used. If so, complete the standard 485 C conditional started above. */ 486 #ifdef __cplusplus 487 } 488 #endif 489 490 #endif 491
