Searched refs:UX_DATA_MEMORY_BARRIER (Results 1 – 9 of 9) sorted by relevance
| /USBX-v6.2.1/common/usbx_host_controllers/src/ |
| D | ux_hcd_ehci_request_interrupt_transfer.c | 123 UX_DATA_MEMORY_BARRIER in _ux_hcd_ehci_request_interrupt_transfer()
|
| D | ux_hcd_ehci_request_bulk_transfer.c | 159 UX_DATA_MEMORY_BARRIER in _ux_hcd_ehci_request_bulk_transfer()
|
| D | ux_hcd_ehci_request_control_transfer.c | 209 UX_DATA_MEMORY_BARRIER in _ux_hcd_ehci_request_control_transfer()
|
| D | ux_hcd_ehci_hsisochronous_tds_process.c | 448 UX_DATA_MEMORY_BARRIER in _ux_hcd_ehci_hsisochronous_tds_process()
|
| /USBX-v6.2.1/ports/arm9/gnu/inc/ |
| D | ux_port.h | 248 #define UX_DATA_MEMORY_BARRIER __asm__ __volatile__("MCR p15, 0, r0, c7, c10, 4"); macro
|
| /USBX-v6.2.1/ports/arm9/iar/inc/ |
| D | ux_port.h | 255 #define UX_DATA_MEMORY_BARRIER __asm volatile("MCR p15, 0, r0, c7, c10, 4"); macro
|
| /USBX-v6.2.1/ports/cortex_a7/gnu/inc/ |
| D | ux_port.h | 255 #define UX_DATA_MEMORY_BARRIER __asm__ __volatile__("DMB"); macro
|
| /USBX-v6.2.1/ports/cortex_a7/iar/inc/ |
| D | ux_port.h | 255 #define UX_DATA_MEMORY_BARRIER __asm volatile("DMB"); macro
|
| /USBX-v6.2.1/common/core/inc/ |
| D | ux_api.h | 247 #ifndef UX_DATA_MEMORY_BARRIER 248 #define UX_DATA_MEMORY_BARRIER macro
|