Searched refs:t6 (Results 1 – 16 of 16) sorted by relevance
/ThreadX-v6.4.1/ports/risc-v32/iar/src/ |
D | tx_timer_interrupt.s | 101 li t6, 0 ; Clear local expired flag 126 ori t6, t6, 1 ; Set local expired flag 146 ori t6, t6, 2 ; Set local expired flag 186 beqz t6, _tx_timer_nothing_expired ; If nothing expired skip the rest 187 and t2, t6, 2 ; Isolate the timer expired bit 189 sw t6, 0(sp) ; Save local expired flag 202 lw t6, 0(sp) ; Recover local expired flag 211 and t2, t6, 1 ; Is the timer expired bit set?
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D | tx_thread_context_save.s | 121 sw x31, 0x34(sp) ; Store t6 188 sw x31, 0x34(sp) ; Store t6
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D | tx_thread_stack_build.s | 175 sw x0, 52(t0) ; Initial t6
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D | tx_thread_context_restore.s | 170 lw x31, 0x34(sp) ; Recover t6
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/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/ |
D | regdef.h | 18 #define t6 $14 macro
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/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/ |
D | regdef.h | 18 #define t6 $14 macro
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/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/src/ |
D | tx_thread_context_save.S | 149 sw $14, 60($29) # Store t6 238 sw $14, 60($29) # Store t6
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D | tx_thread_stack_build.S | 173 sw $0, 60($8) # Initial t6
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D | tx_thread_context_restore.S | 149 lw $14, 60($29) # Recover t6
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/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/src/ |
D | tx_thread_stack_build.mip | 91 $14 (60) Initial t6 177 sw $0, 60($8) # Initial t6
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D | tx_thread_context_save.mip | 155 sw $14, 60($29) # Store t6 244 sw $14, 60($29) # Store t6
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D | tx_thread_context_restore.mip | 149 lw $14, 60($29) # Recover t6 267 lw $14, 60($29) # Recover t6
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D | tx_thread_schedule.mip | 288 lw $14, 60($29) # Recover t6
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/ThreadX-v6.4.1/ports/risc-v32/iar/ |
D | readme_threadx.txt | 51 The IAR RISC-V compiler assumes that registers t0-t6 and a0-a7 are scratch 81 0x34 t6 (x31) ra (x1)
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/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/ |
D | readme_threadx.txt | 117 0x03C t6 ($14) |
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/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/ |
D | readme_threadx.txt | 158 0x03C t6 ($14) |
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