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/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/
Dstart.S96 jalr k1, k0
111 jalr k1, k0
117 mfc0 k1, C0_EBASE // Get cp0 EBase
118 ext k1, k1, 0, 10 // Extract CPUNum
119 sll k1, k1, 3 // Build offset for display char.
120 addiu k1, 8
121 addu k0, k0, k1 // Pointer to a single display character.
122 li k1, 'H' // Indicate that this vpe is in the handler.
123 sw k1, 0(k0) // Write ASCII char to Malta ASCII display.
126 mfc0 k1, C0_EBASE // Get cp0 EBase
[all …]
Dregdef.h32 #define k1 $27 /* reserved for OS */ macro
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/
Dstart.mip96 jalr k1, k0
111 jalr k1, k0
117 mfc0 k1, C0_EBASE // Get cp0 EBase
118 ext k1, k1, 0, 10 // Extract CPUNum
119 sll k1, k1, 3 // Build offset for display char.
120 addiu k1, 8
121 addu k0, k0, k1 // Pointer to a single display character.
122 li k1, 'H' // Indicate that this vpe is in the handler.
123 sw k1, 0(k0) // Write ASCII char to Malta ASCII display.
126 mfc0 k1, C0_EBASE // Get cp0 EBase
[all …]
Dregdef.h32 #define k1 $27 /* reserved for OS */ macro
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/src/
Dtx_thread_context_save.mip76 The return address is in $27 (k1). */