Searched refs:k0 (Results 1 – 4 of 4) sorted by relevance
| /ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/ |
| D | start.S | 95 la k0, _tx_error_exceptions
96 jalr k1, k0
110 la k0, _tx_exception_handler
111 jalr k1, k0
116 li k0, MALTA_DISP_ADDR // Malta ASCII character display.
121 addu k0, k0, k1 // Pointer to a single display character.
123 sw k1, 0(k0) // Write ASCII char to Malta ASCII display.
125 li k0, (GIC_SH_WEDGE | GIC_BASE_ADDR)
129 sw k1, 0(k0) // Clear this IPI.
131 la k0, start_test
[all …]
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| D | regdef.h | 31 #define k0 $26 /* reserved for OS */ macro
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| /ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/ |
| D | regdef.h | 31 #define k0 $26 /* reserved for OS */ macro
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| D | start.mip | 95 la k0, _tx_error_exceptions
96 jalr k1, k0
110 la k0, _tx_exception_handler
111 jalr k1, k0
116 li k0, MALTA_DISP_ADDR // Malta ASCII character display.
121 addu k0, k0, k1 // Pointer to a single display character.
123 sw k1, 0(k0) // Write ASCII char to Malta ASCII display.
125 li k0, (GIC_SH_WEDGE | GIC_BASE_ADDR)
129 sw k1, 0(k0) // Clear this IPI.
131 la k0, start_test
[all …]
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