Home
last modified time | relevance | path

Searched refs:conf (Results 1 – 4 of 4) sorted by relevance

/ThreadX-v6.4.1/ports/cortex_a5x/ac6/example_build/sample_threadx/
Dgic400_gic.c184 void configureSPI(unsigned int ID, unsigned int conf) in configureSPI() argument
188 conf = conf & 0x3; // Mask out unused bits in configureSPI()
194 conf = conf << ID; // Move configuration value into correct bit position in configureSPI()
198 tmp = tmp | conf; // OR in new configuration in configureSPI()
Dgic400_gic.h98 void configureSPI(unsigned int ID, unsigned int conf);
/ThreadX-v6.4.1/ports/cortex_m55/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/SSE-300-MPS3/
Dfvp_sse300_mps3_s.sct35 * area used to align this section on 32 bytes boundary (for SAU conf).
/ThreadX-v6.4.1/ports/cortex_m55/ac6/example_build/demo_secure_zone/RTE/Device/SSE-300-MPS3/
Dfvp_sse300_mps3_s.sct35 * area used to align this section on 32 bytes boundary (for SAU conf).