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/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/src/
Dtx_timer_interrupt.S100 la $9, _tx_timer_interrupt_active # Build address of timer interrupt active count
101 lw $8, ($9) # Pickup timer interrupt active count
102 addu $8, $8, 1 # Increment timer interrupt active count
103 sw $8, ($9) # Store new timer interrupt active count
199 la $9, _tx_timer_interrupt_active # Build address of timer interrupt active count
200 lw $8, ($9) # Pickup timer interrupt active count
201 subu $8, $8, 1 # Decrement timer interrupt active count
202 sw $8, ($9) # Store new timer interrupt active count
/ThreadX-v6.4.1/ports_smp/cortex_a9_smp/gnu/src/
Dtx_timer_interrupt.S118 LDR r1, =_tx_timer_interrupt_active @ Pickup address of timer interrupt active count
119 LDR r0, [r1, #0] @ Pickup interrupt active count
120 ADD r0, r0, #1 @ Increment interrupt active count
121 STR r0, [r1, #0] @ Store new interrupt active count
138 CMP r0, #0 @ Check for previous timer expiration still active
210 LDR r1, =_tx_timer_interrupt_active @ Pickup address of timer interrupt active count
211 LDR r0, [r1, #0] @ Pickup interrupt active count
212 SUB r0, r0, #1 @ Decrement interrupt active count
213 STR r0, [r1, #0] @ Store new interrupt active count
Dtx_thread_smp_unprotect.S102 CMP r3, #0 @ Check to see if the protection is still active
107 CMP r3, #0 @ Check to see if the protection is still active
/ThreadX-v6.4.1/ports_smp/cortex_a5_smp/gnu/src/
Dtx_timer_interrupt.S118 LDR r1, =_tx_timer_interrupt_active @ Pickup address of timer interrupt active count
119 LDR r0, [r1, #0] @ Pickup interrupt active count
120 ADD r0, r0, #1 @ Increment interrupt active count
121 STR r0, [r1, #0] @ Store new interrupt active count
138 CMP r0, #0 @ Check for previous timer expiration still active
210 LDR r1, =_tx_timer_interrupt_active @ Pickup address of timer interrupt active count
211 LDR r0, [r1, #0] @ Pickup interrupt active count
212 SUB r0, r0, #1 @ Decrement interrupt active count
213 STR r0, [r1, #0] @ Store new interrupt active count
Dtx_thread_smp_unprotect.S102 CMP r3, #0 @ Check to see if the protection is still active
107 CMP r3, #0 @ Check to see if the protection is still active
/ThreadX-v6.4.1/ports_smp/cortex_a7_smp/gnu/src/
Dtx_timer_interrupt.S118 LDR r1, =_tx_timer_interrupt_active @ Pickup address of timer interrupt active count
119 LDR r0, [r1, #0] @ Pickup interrupt active count
120 ADD r0, r0, #1 @ Increment interrupt active count
121 STR r0, [r1, #0] @ Store new interrupt active count
138 CMP r0, #0 @ Check for previous timer expiration still active
210 LDR r1, =_tx_timer_interrupt_active @ Pickup address of timer interrupt active count
211 LDR r0, [r1, #0] @ Pickup interrupt active count
212 SUB r0, r0, #1 @ Decrement interrupt active count
213 STR r0, [r1, #0] @ Store new interrupt active count
Dtx_thread_smp_unprotect.s102 CMP r3, #0 @ Check to see if the protection is still active
107 CMP r3, #0 @ Check to see if the protection is still active
/ThreadX-v6.4.1/common/src/
Dtxe_timer_info_get.c79 UINT _txe_timer_info_get(TX_TIMER *timer_ptr, CHAR **name, UINT *active, ULONG *remaining_ticks, in _txe_timer_info_get() argument
105 …status = _tx_timer_info_get(timer_ptr, name, active, remaining_ticks, reschedule_ticks, next_time… in _txe_timer_info_get()
Dtx_timer_info_get.c78 UINT _tx_timer_info_get(TX_TIMER *timer_ptr, CHAR **name, UINT *active, ULONG *remaining_ticks, in _tx_timer_info_get() argument
216 if (active != TX_NULL) in _tx_timer_info_get()
220 *active = timer_active; in _tx_timer_info_get()
/ThreadX-v6.4.1/common_smp/src/
Dtxe_timer_info_get.c79 UINT _txe_timer_info_get(TX_TIMER *timer_ptr, CHAR **name, UINT *active, ULONG *remaining_ticks, in _txe_timer_info_get() argument
105 …status = _tx_timer_info_get(timer_ptr, name, active, remaining_ticks, reschedule_ticks, next_time… in _txe_timer_info_get()
Dtx_timer_info_get.c78 UINT _tx_timer_info_get(TX_TIMER *timer_ptr, CHAR **name, UINT *active, ULONG *remaining_ticks, in _tx_timer_info_get() argument
216 if (active != TX_NULL) in _tx_timer_info_get()
220 *active = timer_active; in _tx_timer_info_get()
/ThreadX-v6.4.1/ports_smp/cortex_a9_smp/ac5/src/
Dtx_timer_interrupt.s116 LDR r1, =_tx_timer_interrupt_active ; Pickup address of timer interrupt active count
117 LDR r0, [r1, #0] ; Pickup interrupt active count
118 ADD r0, r0, #1 ; Increment interrupt active count
119 STR r0, [r1, #0] ; Store new interrupt active count
136 CMP r0, #0 ; Check for previous timer expiration still active
208 LDR r1, =_tx_timer_interrupt_active ; Pickup address of timer interrupt active count
209 LDR r0, [r1, #0] ; Pickup interrupt active count
210 SUB r0, r0, #1 ; Decrement interrupt active count
211 STR r0, [r1, #0] ; Store new interrupt active count
Dtx_thread_smp_unprotect.s100 CMP r3, #0 ; Check to see if the protection is still active
105 CMP r3, #0 ; Check to see if the protection is still active
/ThreadX-v6.4.1/ports_smp/cortex_a5_smp/ac5/src/
Dtx_timer_interrupt.s116 LDR r1, =_tx_timer_interrupt_active ; Pickup address of timer interrupt active count
117 LDR r0, [r1, #0] ; Pickup interrupt active count
118 ADD r0, r0, #1 ; Increment interrupt active count
119 STR r0, [r1, #0] ; Store new interrupt active count
136 CMP r0, #0 ; Check for previous timer expiration still active
208 LDR r1, =_tx_timer_interrupt_active ; Pickup address of timer interrupt active count
209 LDR r0, [r1, #0] ; Pickup interrupt active count
210 SUB r0, r0, #1 ; Decrement interrupt active count
211 STR r0, [r1, #0] ; Store new interrupt active count
Dtx_thread_smp_unprotect.s100 CMP r3, #0 ; Check to see if the protection is still active
105 CMP r3, #0 ; Check to see if the protection is still active
/ThreadX-v6.4.1/ports_smp/cortex_a7_smp/ac5/src/
Dtx_timer_interrupt.s116 LDR r1, =_tx_timer_interrupt_active ; Pickup address of timer interrupt active count
117 LDR r0, [r1, #0] ; Pickup interrupt active count
118 ADD r0, r0, #1 ; Increment interrupt active count
119 STR r0, [r1, #0] ; Store new interrupt active count
136 CMP r0, #0 ; Check for previous timer expiration still active
208 LDR r1, =_tx_timer_interrupt_active ; Pickup address of timer interrupt active count
209 LDR r0, [r1, #0] ; Pickup interrupt active count
210 SUB r0, r0, #1 ; Decrement interrupt active count
211 STR r0, [r1, #0] ; Store new interrupt active count
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/src/
Dtx_timer_interrupt.mip97 /* Increment timer interrupt active counter. */
100 la $9, _tx_timer_interrupt_active # Build address of timer interrupt active count
101 lw $8, ($9) # Pickup timer interrupt active count
102 addu $8, $8, 1 # Increment timer interrupt active count
103 sw $8, ($9) # Store new timer interrupt active count
196 /* Decrement timer interrupt active counter. */
199 la $9, _tx_timer_interrupt_active # Build address of timer interrupt active count
200 lw $8, ($9) # Pickup timer interrupt active count
201 subu $8, $8, 1 # Decrement timer interrupt active count
202 sw $8, ($9) # Store new timer interrupt active count
/ThreadX-v6.4.1/common_modules/module_lib/src/
Dtxm_timer_info_get.c74 UINT _txe_timer_info_get(TX_TIMER *timer_ptr, CHAR **name, UINT *active, ULONG *remaining_ticks, UL… in _txe_timer_info_get() argument
80 extra_parameters[0] = (ALIGN_TYPE) active; in _txe_timer_info_get()
/ThreadX-v6.4.1/test/smp/regression/
Dthreadx_timer_information_test.c97 UINT active; in thread_0_entry() local
192 …status += tx_timer_info_get(&timer_0, &name, &active, &remaining_ticks, &reschedule_ticks, &next_t… in thread_0_entry()
195 …if ((status != TX_SUCCESS) || (active != TX_TRUE) || (remaining_ticks != 1) || (reschedule_ticks !… in thread_0_entry()
205 …status += tx_timer_info_get(&timer_0, &name, &active, &remaining_ticks, &reschedule_ticks, &next_t… in thread_0_entry()
208 …if ((status != TX_SUCCESS) || (active != TX_FALSE) || (remaining_ticks != 1) || (reschedule_ticks … in thread_0_entry()
220 …status += tx_timer_info_get(&timer_0, &name, &active, &remaining_ticks, &reschedule_ticks, &next_t… in thread_0_entry()
223 …if ((status != TX_SUCCESS) || (active != TX_TRUE) || (remaining_ticks != 100) || (reschedule_ticks… in thread_0_entry()
/ThreadX-v6.4.1/test/tx/regression/
Dthreadx_timer_information_test.c97 UINT active; in thread_0_entry() local
192 …status += tx_timer_info_get(&timer_0, &name, &active, &remaining_ticks, &reschedule_ticks, &next_t… in thread_0_entry()
195 …if ((status != TX_SUCCESS) || (active != TX_TRUE) || (remaining_ticks != 1) || (reschedule_ticks !… in thread_0_entry()
205 …status += tx_timer_info_get(&timer_0, &name, &active, &remaining_ticks, &reschedule_ticks, &next_t… in thread_0_entry()
208 …if ((status != TX_SUCCESS) || (active != TX_FALSE) || (remaining_ticks != 1) || (reschedule_ticks … in thread_0_entry()
220 …status += tx_timer_info_get(&timer_0, &name, &active, &remaining_ticks, &reschedule_ticks, &next_t… in thread_0_entry()
223 …if ((status != TX_SUCCESS) || (active != TX_TRUE) || (remaining_ticks != 100) || (reschedule_ticks… in thread_0_entry()
/ThreadX-v6.4.1/ports_smp/arc_hs_smp/metaware/src/
Dtx_thread_smp_unprotect.s86 breq r6, 0, _still_protected ; If zero, protection is still active
89 brne r6, 0, _still_protected ; If non-zero, protection is still active
Dtx_timer_interrupt.s102 ld r0, [gp,_tx_timer_interrupt_active@sda] ; Pickup current timer active count
103 add r0, r0, 1 ; Increment the active count
104 st r0, [gp,_tx_timer_interrupt_active@sda] ; Store the new timer active count
/ThreadX-v6.4.1/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/
Dgic.c55 uint32_t pending, active;
57 active = ((GICDistributor->ICDABR[IRQn / 32]) >> (IRQn % 32)) & 0x1;
60 return ((active<<1) | pending);
/ThreadX-v6.4.1/ports/cortex_r4/ac6/example_build/sample_threadx/
Dgic.c55 uint32_t pending, active;
57 active = ((GICDistributor->ICDABR[IRQn / 32]) >> (IRQn % 32)) & 0x1;
60 return ((active<<1) | pending);
/ThreadX-v6.4.1/utility/low_power/
Dlow_power.md39 …active. If there are ThreadX timers active, the elapsed time while in low power mode must be measu…
45 … the internal ThreadX tick count is 2000 and there are no ThreadX timers active. The processor goe…
47 … The internal ThreadX tick count is 1000 and there are no ThreadX timers active. The processor goe…
75 …```. If **TX_LOW_POWER_TICKLESS** is not defined and there are no timers active, the *tx_low_power…
83 …only if no ThreadX timers are active. With symbol **TX_LOW_POWER_TICKLESS** defined, if there are …
231 1. A ThreadX timer is active. Function ```tx_timer_get_next``` returns **TX_TRUE**. Note that in th…
233 2. There are no ThreadX timers active. Function ```tx_timer_get_next``` returns *TX_FALSE*.
406 - *TX_TRUE* (1) At least one timer is active.
407 - *TX_FALSE* (0) No timers are currently active.

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