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Searched refs:TX_EL_TNI_VALID_OFFSET (Results 1 – 25 of 26) sorted by relevance

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/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/src/
Dtx_el.c212 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
275 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
318 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
420 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports_arch/ARMv7-M/threadx/ghs/src/
Dtx_el.c211 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
274 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
317 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
419 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports/cortex_m4/ghs/src/
Dtx_el.c211 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
274 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
317 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
419 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports/cortex_m3/ghs/src/
Dtx_el.c211 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
274 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
317 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
419 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports/cortex_r7/ghs/src/
Dtx_el.c211 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
274 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
317 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
419 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports/cortex_a8/ghs/src/
Dtx_el.c211 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
274 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
317 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
419 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports/cortex_a5/ghs/src/
Dtx_el.c211 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
274 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
317 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
419 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports/cortex_r5/ghs/src/
Dtx_el.c211 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
274 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
317 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
419 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports/cortex_a9/ghs/src/
Dtx_el.c211 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
274 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
317 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
419 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports/cortex_a7/ghs/src/
Dtx_el.c211 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
274 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
317 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
419 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports/cortex_r4/ghs/src/
Dtx_el.c211 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
274 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
317 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
419 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports/cortex_m7/ghs/src/
Dtx_el.c211 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
274 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
317 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
419 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports_smp/cortex_a5x_smp/green/src/
Dtx_el.c212 *((UCHAR *) (_tx_el_tni_start + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_initialize()
275 if (*(entry_ptr + TX_EL_TNI_VALID_OFFSET) == TX_EL_INVALID_ENTRY) in _tx_el_thread_register()
318 *((UCHAR *) (entry_ptr + TX_EL_TNI_VALID_OFFSET)) = (ULONG) TX_EL_VALID_ENTRY; in _tx_el_thread_register()
420 *(entry_ptr + TX_EL_TNI_VALID_OFFSET) = TX_EL_INVALID_ENTRY; in _tx_el_thread_unregister()
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/inc/
Dtx_el.h71 #define TX_EL_TNI_VALID_OFFSET 34 macro
/ThreadX-v6.4.1/ports/cortex_m4/ghs/inc/
Dtx_el.h71 #define TX_EL_TNI_VALID_OFFSET 34 macro
/ThreadX-v6.4.1/ports/cortex_m3/ghs/inc/
Dtx_el.h71 #define TX_EL_TNI_VALID_OFFSET 34 macro
/ThreadX-v6.4.1/ports/cortex_r5/ghs/inc/
Dtx_el.h71 #define TX_EL_TNI_VALID_OFFSET 34 macro
/ThreadX-v6.4.1/ports/cortex_a7/ghs/inc/
Dtx_el.h71 #define TX_EL_TNI_VALID_OFFSET 34 macro
/ThreadX-v6.4.1/ports_smp/cortex_a5x_smp/green/inc/
Dtx_el.h71 #define TX_EL_TNI_VALID_OFFSET 34 macro
/ThreadX-v6.4.1/ports/cortex_r4/ghs/inc/
Dtx_el.h71 #define TX_EL_TNI_VALID_OFFSET 34 macro
/ThreadX-v6.4.1/ports/cortex_r7/ghs/inc/
Dtx_el.h71 #define TX_EL_TNI_VALID_OFFSET 34 macro
/ThreadX-v6.4.1/ports_arch/ARMv7-M/threadx/ghs/inc/
Dtx_el.h71 #define TX_EL_TNI_VALID_OFFSET 34 macro
/ThreadX-v6.4.1/ports/cortex_a8/ghs/inc/
Dtx_el.h71 #define TX_EL_TNI_VALID_OFFSET 34 macro
/ThreadX-v6.4.1/ports/cortex_a5/ghs/inc/
Dtx_el.h71 #define TX_EL_TNI_VALID_OFFSET 34 macro
/ThreadX-v6.4.1/ports/cortex_a9/ghs/inc/
Dtx_el.h71 #define TX_EL_TNI_VALID_OFFSET 34 macro

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