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/ThreadX-v6.4.1/ports_module/cortex_r4/ac6/module_manager/src/
Dtx_thread_fiq_nesting_start.S31 #define SYS_MODE 0x12 // System mode macro
90 CPS #SYS_MODE // Switch to system mode
Dtx_thread_irq_nesting_start.S31 #define SYS_MODE 0x1F // System mode bits macro
90 CPS #SYS_MODE // Switch to System Mode
Dtx_thread_context_restore.S36 #define SYS_MODE 0x1F // SYS mode macro
185 … CPS #SYS_MODE // Switch to SYS mode to save context on thread stack
193 …CPS #SYS_MODE // Switch to SYS mode to save remaining context on thr…
245 ORR r1, r1, #SYS_MODE // Change to SYS Mode
Dtx_thread_schedule.S45 #define SYS_MODE 0x1F // SYS mode macro
177 ORR r0, r0, #SYS_MODE // system mode code
181 CPS #SYS_MODE // Switch to SYS mode
219 CPS #SYS_MODE // Switch to SYS mode
316 CPS #SYS_MODE // Enter SYS mode
379 CPS #SYS_MODE // Enter SYS mode
390 CPS #SYS_MODE // Enter SYS mode
401 CPS #SYS_MODE // Enter SYS mode
Dtx_thread_stack_build.S32 #define SYS_MODE 0x1F // SYS mode macro
149 ORR r3, r3, #SYS_MODE // Build CPSR, SYS mode, interrupts enabled
Dtxm_module_manager_thread_stack_build.S25 #define SYS_MODE 0x1F // SYS mode macro
136 ORREQ r3, r3, #SYS_MODE // Flag not set: Build CPSR, SYS mode, IRQ enabled
/ThreadX-v6.4.1/ports/cortex_r4/ac6/src/
Dtx_thread_fiq_nesting_start.S31 #define SYS_MODE 0x12 // System mode macro
90 CPS #SYS_MODE // Switch to system mode
Dtx_thread_irq_nesting_start.S31 #define SYS_MODE 0x1F // System mode bits macro
90 CPS #SYS_MODE // Switch to System Mode
/ThreadX-v6.4.1/ports_module/cortex_r4/iar/module_manager/src/
Dtx_thread_irq_nesting_start.s23 SYS_MODE DEFINE 0x1F ; System mode label
77 CPS #SYS_MODE ; Enter SYS mode
Dtx_thread_stack_build.s23 SYS_MODE DEFINE 0x1F ; SYS mode label
129 ORR r3, r1, #SYS_MODE ; Build CPSR, SYS mode, interrupts enabled
/ThreadX-v6.4.1/ports/cortex_r4/iar/src/
Dtx_thread_irq_nesting_start.s33 SYS_MODE DEFINE 0x1F ; System mode label
87 CPS #SYS_MODE ; Enter SYS mode
/ThreadX-v6.4.1/ports/cortex_r5/iar/src/
Dtx_thread_irq_nesting_start.s33 SYS_MODE DEFINE 0x1F ; System mode label
87 CPS #SYS_MODE ; Enter SYS mode
/ThreadX-v6.4.1/ports_module/cortex_a7/gnu/module_manager/src/
Dtx_thread_context_restore.s30 SYS_MODE = 0x1F // SYS mode define
142 CPS #SYS_MODE // Enter SYS mode
147 CPS #SYS_MODE // Enter SYS mode
Dtx_thread_schedule.s39 #define SYS_MODE 0x1F // SYS mode macro
190 ORR r0, r0, #SYS_MODE // system mode code
194 CPS #SYS_MODE // Switch to SYS mode
244 CPS #SYS_MODE // Switch to SYS mode
340 CPS #SYS_MODE // Enter SYS mode
393 CPS #SYS_MODE // Enter SYS mode
405 CPS #SYS_MODE // Enter SYS mode
416 CPS #SYS_MODE // Enter SYS mode
Dtx_thread_stack_build.s31 SYS_MODE = 0x1F // SYS mode define
132 ORR r3, #SYS_MODE // Build CPSR, SYS mode, interrupts enabled
Dtxm_module_manager_thread_stack_build.s31 #define SYS_MODE 0x1F // SYS mode macro
154 ORREQ r3, #SYS_MODE // Flag not set: Build CPSR, SYS mode, IRQ enabled
/ThreadX-v6.4.1/ports_module/cortex_a7/iar/module_manager/src/
Dtx_thread_context_restore.s27 SYS_MODE EQU 0x1F ; SYS mode define
141 CPS #SYS_MODE ; Enter SYS mode
146 CPS #SYS_MODE ; Enter SYS mode
/ThreadX-v6.4.1/ports_module/cortex_r4/ac6/example_build/sample_threadx/
Dtx_initialize_low_level.S37 #define SYS_MODE 0x1F // SYS mode macro
435 CPS #SYS_MODE // Enter SYS mode
443 ORR r0, r0, #SYS_MODE // Return into SYS mode
/ThreadX-v6.4.1/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/
Dtx_initialize_low_level.S37 #define SYS_MODE 0x1F // SYS mode macro
435 CPS #SYS_MODE // Enter SYS mode
443 ORR r0, r0, #SYS_MODE // Return into SYS mode
/ThreadX-v6.4.1/ports_module/cortex_a7/gnu/example_build/
Dtx_initialize_low_level.s32 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
121 MOV r3, #SYS_MODE // Build SYS mode CPSR
416 ORR r0, r0, #SYS_MODE // Return into SYS mode
/ThreadX-v6.4.1/ports/cortex_a12/ac6/example_build/sample_threadx/
Dtx_initialize_low_level.S27 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
118 MOV r3, #SYS_MODE // Build SYS mode CPSR
/ThreadX-v6.4.1/ports_arch/ARMv7-A/threadx/ports/ac6/example_build/sample_threadx/
Dtx_initialize_low_level.S27 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
118 MOV r3, #SYS_MODE // Build SYS mode CPSR
/ThreadX-v6.4.1/ports/cortex_a12/gnu/example_build/
Dtx_initialize_low_level.S30 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
125 MOV r3, #SYS_MODE // Build SYS mode CPSR
/ThreadX-v6.4.1/ports/cortex_a15/ac6/example_build/sample_threadx/
Dtx_initialize_low_level.S27 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
118 MOV r3, #SYS_MODE // Build SYS mode CPSR
/ThreadX-v6.4.1/ports/cortex_a15/gnu/example_build/
Dtx_initialize_low_level.S30 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
125 MOV r3, #SYS_MODE // Build SYS mode CPSR

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