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/ThreadX-v6.4.1/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/ARMCM23_TZ/
Dsystem_ARMCM23.c43 #define SYSTEM_CLOCK (XTAL / 2U) macro
54 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
62 SystemCoreClock = SYSTEM_CLOCK; in SystemCoreClockUpdate()
79 SystemCoreClock = SYSTEM_CLOCK; in SystemInit()
/ThreadX-v6.4.1/ports/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/ARMCM23_TZ/
Dsystem_ARMCM23.c43 #define SYSTEM_CLOCK (XTAL / 2U) macro
56 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
64 SystemCoreClock = SYSTEM_CLOCK; in SystemCoreClockUpdate()
81 SystemCoreClock = SYSTEM_CLOCK; in SystemInit()
/ThreadX-v6.4.1/ports/cortex_m23/ac6/example_build/demo_secure_zone/RTE/Device/ARMCM23_TZ/
Dsystem_ARMCM23.c43 #define SYSTEM_CLOCK (XTAL / 2U) macro
54 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
62 SystemCoreClock = SYSTEM_CLOCK; in SystemCoreClockUpdate()
79 SystemCoreClock = SYSTEM_CLOCK; in SystemInit()
/ThreadX-v6.4.1/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/Device/ARMCM23_TZ/
Dsystem_ARMCM23.c43 #define SYSTEM_CLOCK (XTAL / 2U) macro
54 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
62 SystemCoreClock = SYSTEM_CLOCK; in SystemCoreClockUpdate()
79 SystemCoreClock = SYSTEM_CLOCK; in SystemInit()
/ThreadX-v6.4.1/ports/cortex_m33/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/ARMCM33_DSP_FP_TZ/
Dsystem_ARMCM33.c51 #define SYSTEM_CLOCK (XTAL / 2U) macro
64 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
72 SystemCoreClock = SYSTEM_CLOCK; in SystemCoreClockUpdate()
98 SystemCoreClock = SYSTEM_CLOCK; in SystemInit()
/ThreadX-v6.4.1/ports_module/cortex_m33/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/ARMCM33_DSP_FP_TZ/
Dsystem_ARMCM33.c51 #define SYSTEM_CLOCK (XTAL / 2U) macro
64 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
72 SystemCoreClock = SYSTEM_CLOCK; in SystemCoreClockUpdate()
98 SystemCoreClock = SYSTEM_CLOCK; in SystemInit()
/ThreadX-v6.4.1/ports/cortex_m33/ac6/example_build/demo_secure_zone/RTE/Device/ARMCM33_DSP_FP_TZ/
Dsystem_ARMCM33.c51 #define SYSTEM_CLOCK (XTAL / 2U) macro
62 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
70 SystemCoreClock = SYSTEM_CLOCK; in SystemCoreClockUpdate()
96 SystemCoreClock = SYSTEM_CLOCK; in SystemInit()
/ThreadX-v6.4.1/ports_module/cortex_m33/ac6/example_build/demo_secure_zone/RTE/Device/ARMCM33_DSP_FP_TZ/
Dsystem_ARMCM33.c51 #define SYSTEM_CLOCK (XTAL / 2U) macro
64 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
72 SystemCoreClock = SYSTEM_CLOCK; in SystemCoreClockUpdate()
98 SystemCoreClock = SYSTEM_CLOCK; in SystemInit()
/ThreadX-v6.4.1/ports/cortex_m55/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/SSE-300-MPS3/
Dsystem_SSE300MPS3.c30 #define SYSTEM_CLOCK (XTAL) macro
43 uint32_t SystemCoreClock = SYSTEM_CLOCK;
51 SystemCoreClock = SYSTEM_CLOCK; in SystemCoreClockUpdate()
/ThreadX-v6.4.1/ports/cortex_m55/ac6/example_build/demo_secure_zone/RTE/Device/SSE-300-MPS3/
Dsystem_SSE300MPS3.c34 #define SYSTEM_CLOCK (XTAL) macro
100 uint32_t SystemCoreClock = SYSTEM_CLOCK;
108 SystemCoreClock = SYSTEM_CLOCK; in SystemCoreClockUpdate()
185 SystemCoreClock = SYSTEM_CLOCK; in SystemInit()
/ThreadX-v6.4.1/ports_module/cortex_m7/iar/example_build/
Dtx_initialize_low_level.s30 SYSTEM_CLOCK EQU 25000000 define
31 SYSTICK_CYCLES EQU ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports_module/cortex_m4/iar/example_build/
Dtx_initialize_low_level.s30 SYSTEM_CLOCK EQU 25000000 define
31 SYSTICK_CYCLES EQU ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports_arch/ARMv7-M/threadx/iar/example_build/
Dtx_initialize_low_level.s29 SYSTEM_CLOCK EQU 25000000 define
30 SYSTICK_CYCLES EQU ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports_module/cortex_m7/gnu/example_build/
Dtx_initialize_low_level.S36 SYSTEM_CLOCK = 6000000 define
37 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports_module/cortex_m4/gnu/example_build/
Dtx_initialize_low_level.S36 SYSTEM_CLOCK = 6000000 define
37 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports_module/cortex_m0+/iar/example_build/
Dtx_initialize_low_level.s41 SYSTEM_CLOCK EQU 7200000 define
42 SYSTICK_CYCLES EQU ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports_module/cortex_m7/ac6/example_build/sample_threadx_module_manager/
Dtx_initialize_low_level.S36 SYSTEM_CLOCK = 6000000 define
37 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports/cortex_m23/iar/src/
Dtx_initialize_low_level.s30 SYSTEM_CLOCK EQU 96000000 define
31 SYSTICK_CYCLES EQU ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports_module/cortex_m23/iar/example_build/
Dtx_initialize_low_level.s30 SYSTEM_CLOCK EQU 96000000 define
31 SYSTICK_CYCLES EQU ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports_module/cortex_m4/ac6/example_build/sample_threadx_module_manager/
Dtx_initialize_low_level.S36 SYSTEM_CLOCK = 6000000 define
37 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports_arch/ARMv7-M/threadx/ac6/example_build/sample_threadx/
Dtx_initialize_low_level.S39 SYSTEM_CLOCK = 6000000 define
40 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports_arch/ARMv7-M/threadx/gnu/example_build/
Dtx_initialize_low_level.S36 SYSTEM_CLOCK = 6000000 define
37 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports_module/cortex_m23/ac6/example_build/
Dtx_initialize_low_level.S23 SYSTEM_CLOCK = 6000000 define
24 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports_module/cortex_m3/ac6/example_build/sample_threadx_module_manager/
Dtx_initialize_low_level.S36 SYSTEM_CLOCK = 6000000 define
37 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
/ThreadX-v6.4.1/ports/cortex_m7/gnu/example_build/
Dtx_initialize_low_level.S35 SYSTEM_CLOCK = 6000000 define
36 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)

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