| /ThreadX-v6.4.1/ports/cortex_m55/ac6/example_build/demo_secure_zone/RTE/Device/SSE-300-MPS3/ |
| D | region_limits.h | 42 #define HEAP_SIZE (0x00000400) /* 1 KiB */ macro
|
| /ThreadX-v6.4.1/ports/cortex_m55/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/SSE-300-MPS3/ |
| D | region_limits.h | 42 #define HEAP_SIZE (0x00000400) /* 1 KiB */ macro
|
| /ThreadX-v6.4.1/ports_module/cortex_m7/ac5/example_build/ |
| D | tx_initialize_low_level.S | 42 HEAP_SIZE EQU 0x00000000 define
53 SPACE HEAP_SIZE
212 LDR r2, =(HeapMem + HEAP_SIZE)
|
| /ThreadX-v6.4.1/ports_module/cortex_m4/ac5/example_build/ |
| D | tx_initialize_low_level.S | 42 HEAP_SIZE EQU 0x00000000 define
53 SPACE HEAP_SIZE
212 LDR r2, =(HeapMem + HEAP_SIZE)
|
| /ThreadX-v6.4.1/ports_arch/ARMv7-M/threadx/ac5/example_build/ |
| D | tx_initialize_low_level.s | 44 HEAP_SIZE EQU 0x00000000 define
55 SPACE HEAP_SIZE
205 LDR r2, =(HeapMem + HEAP_SIZE)
|
| /ThreadX-v6.4.1/ports/cortex_m3/ac5/example_build/ |
| D | tx_initialize_low_level.s | 41 HEAP_SIZE EQU 0x00000000 define
52 SPACE HEAP_SIZE
202 LDR R2, =(HeapMem + HEAP_SIZE)
|
| /ThreadX-v6.4.1/ports/cortex_m3/keil/example_build/ |
| D | tx_initialize_low_level.s | 41 HEAP_SIZE EQU 0x00000000 define
52 SPACE HEAP_SIZE
201 LDR R2, =(HeapMem + HEAP_SIZE)
|
| /ThreadX-v6.4.1/ports_arch/ARMv7-A/threadx/ports/ac5/example_build/ |
| D | tx_initialize_low_level.s | 35 HEAP_SIZE EQU 4096 // Heap size define
148 LDR r2, =HEAP_SIZE // Pickup the heap size
203 LDR r2, =HEAP_SIZE // Pickup the heap size
|
| /ThreadX-v6.4.1/ports_module/cortex_m3/ac5/example_build/ |
| D | tx_initialize_low_level.S | 55 HEAP_SIZE EQU 0x00000000 define
66 SPACE HEAP_SIZE
225 LDR r2, =(HeapMem + HEAP_SIZE)
|
| /ThreadX-v6.4.1/ports/cortex_m4/ac5/example_build/ |
| D | tx_initialize_low_level.s | 39 HEAP_SIZE EQU 0x00000000 define
50 SPACE HEAP_SIZE
206 LDR r2, =(HeapMem + HEAP_SIZE)
|
| /ThreadX-v6.4.1/ports/cortex_m4/keil/example_build/ |
| D | tx_initialize_low_level.s | 53 HEAP_SIZE EQU 0x00000000 define
64 SPACE HEAP_SIZE
221 LDR r2, =(HeapMem + HEAP_SIZE)
|
| /ThreadX-v6.4.1/ports/cortex_m7/ac5/example_build/ |
| D | tx_initialize_low_level.s | 43 HEAP_SIZE EQU 0x00000000 define
54 SPACE HEAP_SIZE
211 LDR r2, =(HeapMem + HEAP_SIZE)
|
| /ThreadX-v6.4.1/ports/cortex_m0/ac5/example_build/ |
| D | tx_initialize_low_level.s | 41 HEAP_SIZE EQU 0x00000000 define
52 SPACE HEAP_SIZE
218 LDR R2, =(HeapMem + HEAP_SIZE)
|
| /ThreadX-v6.4.1/ports/cortex_m0/keil/example_build/ |
| D | tx_initialize_low_level.s | 41 HEAP_SIZE EQU 0x00000000 define
52 SPACE HEAP_SIZE
218 LDR R2, =(HeapMem + HEAP_SIZE)
|
| /ThreadX-v6.4.1/ports/risc-v32/iar/example_build/ |
| D | sample_threadx.icf | 19 define block HEAP with alignment = 16, size = HEAP_SIZE { };
|
| /ThreadX-v6.4.1/ports_module/cortex_m23/ac6/example_build/ |
| D | tx_initialize_low_level.S | 29 HEAP_SIZE = 0x00000000 define
|
| /ThreadX-v6.4.1/ports_module/cortex_m23/gnu/module_manager/src/ |
| D | tx_initialize_low_level.S | 29 HEAP_SIZE = 0x00000000 define
|
| /ThreadX-v6.4.1/ports/cortex_a8/ac5/example_build/ |
| D | tx_initialize_low_level.s | 47 HEAP_SIZE EQU 4096 ; Heap size define
145 LDR r2, =HEAP_SIZE ; Pickup the heap size
210 LDR r2, =HEAP_SIZE ; Pickup the heap size
|
| /ThreadX-v6.4.1/ports/cortex_r4/ac5/example_build/ |
| D | tx_initialize_low_level.s | 47 HEAP_SIZE EQU 4096 ; Heap size define
145 LDR r2, =HEAP_SIZE ; Pickup the heap size
210 LDR r2, =HEAP_SIZE ; Pickup the heap size
|
| /ThreadX-v6.4.1/ports/cortex_r5/ac5/example_build/ |
| D | tx_initialize_low_level.s | 47 HEAP_SIZE EQU 4096 ; Heap size define
145 LDR r2, =HEAP_SIZE ; Pickup the heap size
210 LDR r2, =HEAP_SIZE ; Pickup the heap size
|
| /ThreadX-v6.4.1/ports/cortex_a5/ac5/example_build/ |
| D | tx_initialize_low_level.s | 47 HEAP_SIZE EQU 4096 ; Heap size define
145 LDR r2, =HEAP_SIZE ; Pickup the heap size
210 LDR r2, =HEAP_SIZE ; Pickup the heap size
|
| /ThreadX-v6.4.1/ports/cortex_m23/ac6/example_build/ |
| D | tx_initialize_low_level.S | 32 HEAP_SIZE = 0x00000000 define
|
| /ThreadX-v6.4.1/ports/cortex_m23/gnu/src/ |
| D | tx_initialize_low_level.S | 32 HEAP_SIZE = 0x00000000 define
|
| /ThreadX-v6.4.1/ports/cortex_a9/ac5/example_build/ |
| D | tx_initialize_low_level.s | 47 HEAP_SIZE EQU 4096 ; Heap size define
165 LDR r2, =HEAP_SIZE ; Pickup the heap size
230 LDR r2, =HEAP_SIZE ; Pickup the heap size
|
| /ThreadX-v6.4.1/ports/cortex_a7/ac5/example_build/ |
| D | tx_initialize_low_level.s | 47 HEAP_SIZE EQU 4096 ; Heap size define
165 LDR r2, =HEAP_SIZE ; Pickup the heap size
230 LDR r2, =HEAP_SIZE ; Pickup the heap size
|
