1 // ----------------------------------------------------------
2 // GIC400 - Generic Interrupt Controller
3 // Header
4 //
5 // Martin Weidmann Dec 2011
6 // ----------------------------------------------------------
7 
8 #ifndef __gic400_gic_h
9 #define __gic400_gic_h
10 
11 #define GIC_GIC400_PPI0         (0)
12 #define GIC_GIC400_PPI1         (1)
13 #define GIC_GIC400_PPI2         (2)
14 #define GIC_GIC400_PPI3         (3)
15 #define GIC_GIC400_PPI4         (4)
16 #define GIC_GIC400_PPI5         (5)
17 #define GIC_GIC400_PPI6         (6)
18 #define GIC_GIC400_PPI7         (7)
19 #define GIC_GIC400_PPI8         (8)
20 #define GIC_GIC400_PPI9         (9)
21 #define GIC_GIC400_PPI10        (10)
22 #define GIC_GIC400_PPI11        (11)
23 #define GIC_GIC400_PPI12        (12)
24 #define GIC_GIC400_PPI13        (13)
25 #define GIC_GIC400_PPI14        (14)
26 #define GIC_GIC400_PPI15        (15)
27 #define GIC_GIC400_PPI16        (16)
28 #define GIC_GIC400_PPI17        (17)
29 #define GIC_GIC400_PPI18        (18)
30 #define GIC_GIC400_PPI19        (19)
31 #define GIC_GIC400_PPI20        (20)
32 #define GIC_GIC400_PPI21        (21)
33 #define GIC_GIC400_PPI22        (22)
34 #define GIC_GIC400_PPI23        (23)
35 #define GIC_GIC400_PPI24        (24)
36 #define GIC_GIC400_PPI25        (25)
37 #define GIC_GIC400_PPI26        (26)
38 #define GIC_GIC400_PPI27        (27)
39 #define GIC_GIC400_PPI28        (28)
40 #define GIC_GIC400_PPI29        (29)
41 #define GIC_GIC400_PPI30        (30)
42 #define GIC_GIC400_PPI31        (31)
43 
44 // ----------------------------------------------------------
45 
46 // Sets the address of the GIC's distributor and CPU interfaces
47 void setGICAddr(void* dist, void* cpu);
48 
49 // ----------------------------------------------------------
50 
51 //  Global enable of the Interrupt Distributor
52 void enableGIC(void);
53 
54 // Global disable of the Interrupt Distributor
55 void disableGIC(void);
56 
57 // ----------------------------------------------------------
58 
59 // Enables the interrupt source number ID
60 void enableIntID(unsigned int ID);
61 
62 // Disables the interrupt source number ID
63 void disableIntID(unsigned int ID);
64 
65 // ----------------------------------------------------------
66 
67 // Sets the priority of the specified ID
68 void setIntPriority(unsigned int ID, unsigned int priority);
69 
70 // Returns the priority of the specified ID
71 unsigned int getIntPriority(unsigned int ID);
72 
73 // ----------------------------------------------------------
74 
75 #define GIC_GIC400_TARGET_CPU0                (0x01)
76 #define GIC_GIC400_TARGET_CPU1                (0x02)
77 #define GIC_GIC400_TARGET_CPU2                (0x04)
78 #define GIC_GIC400_TARGET_CPU3                (0x08)
79 #define GIC_GIC400_TARGET_CPU4                (0x10)
80 #define GIC_GIC400_TARGET_CPU5                (0x20)
81 #define GIC_GIC400_TARGET_CPU6                (0x40)
82 #define GIC_GIC400_TARGET_CPU7                (0x80)
83 
84 // Sets the target CPUs of the specified ID
85 // For 'target' use one of the above defines
86 void setIntTarget(unsigned int ID, unsigned int target);
87 
88 // Returns the target CPUs of the specified ID
89 unsigned int getIntTarget(unsigned int ID);
90 
91 // ----------------------------------------------------------
92 
93 #define GIC_GIC400_CONFIG_LEVEL               (0)
94 #define GIC_GIC400_CONFIG_EDGE                (2)
95 
96 // Configures the specified ID as being level or edge triggered
97 
98 void configureSPI(unsigned int ID, unsigned int conf);
99 
100 // ----------------------------------------------------------
101 
102 // Sets the pending bit of the specified ID
103 void setIntPending(unsigned int ID);
104 
105 // Clears the pending bit of the specified ID
106 void clearIntPending(unsigned int ID);
107 
108 #define GIC_GIC400_PENDING_IS_SET             (1)
109 #define GIC_GIC400_PENDING_IS_CLEAR           (0)
110 
111 // Returns the value of the status bit of the specified ID
112 unsigned int getIntPending(unsigned int ID);
113 
114 // ----------------------------------------------------------
115 
116 #define GIC_GIC400_SGI_SECURE              (0)
117 #define GIC_GIC400_SGI_NONSECURE           (1)
118 #define GIC_GIC400_SGI_FILTER_USE_LIST     (0)
119 #define GIC_GIC400_SGI_FILTER_NOT_THIS_CPU (1)
120 #define GIC_GIC400_SGI_FILTER_THIS_CPU     (2)
121 #define GIC_GIC400_SGI_CPU0                (0x01)
122 #define GIC_GIC400_SGI_CPU1                (0x02)
123 #define GIC_GIC400_SGI_CPU2                (0x04)
124 #define GIC_GIC400_SGI_CPU3                (0x08)
125 #define GIC_GIC400_SGI_CPU4                (0x10)
126 #define GIC_GIC400_SGI_CPU5                (0x20)
127 #define GIC_GIC400_SGI_CPU6                (0x40)
128 #define GIC_GIC400_SGI_CPU7                (0x80)
129 
130 // Send a software generate interrupt
131 void sendSGI(unsigned int ID, unsigned int cpu_list, unsigned int filter_list, unsigned int SATT);
132 
133 // ----------------------------------------------------------
134 
135 // Sets the specified ID as secure
136 void makeIntGroup0(unsigned int ID);
137 
138 // Set the specified ID as non-secure
139 void makeIntGroup1(unsigned int ID);
140 
141 // Returns the security of the specified ID
142 unsigned int getIntGroup(unsigned int ID);
143 
144 // ------------------------------------------------------------
145 // CPU Interface functions
146 // ------------------------------------------------------------
147 
148 // Enables the processor interface
149 // Must been done one each core seperately
150 void enableCPUInterface(void);
151 
152 // Enables the group 1 (non-secure) CPU interface
153 // This function can only be called from the Secure world
154 // Must been done one each core seperately
155 void enableNonSecureCPUInterface(void);
156 
157 // Disables the processor interface
158 void disableCPUInterface(void);
159 
160 // Enables the sending of secure interrupts as FIQs
161 void enableSecureFIQs(void);
162 
163 // Disables the sending of secure interrupts as FIQs
164 void disableSecureFIQs(void);
165 
166 //  Returns the value of the Interrupt Acknowledge Register
167 unsigned int readIntAck(void);
168 
169 // Writes ID to the End Of Interrupt register
170 void writeEOI(unsigned int ID);
171 
172 //  Returns the value of the Aliased Interrupt Acknowledge Register
173 unsigned int readAliasedIntAck(void);
174 
175 // Writes ID to the Aliased End Of Interrupt register
176 void writeAliasedEOI(unsigned int ID);
177 
178 // Sets the Priority mask register for the core run on
179 // The reset value masks ALL interrupts!
180 void setPriorityMask(unsigned int priority);
181 
182 // Sets the Binary Point Register for the core run on
183 void setBinaryPoint(unsigned int priority);
184 
185 // Sets the Aliased Binary Point Register for the core run on
186 void setAliasedBinaryPoint(unsigned int priority);
187 
188 #endif
189 
190 // ----------------------------------------------------------
191 // End of gic400_gic.h
192 // ----------------------------------------------------------
193