Home
last modified time | relevance | path

Searched refs:GCR_CPC_BASE (Results 1 – 5 of 5) sorted by relevance

/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/
Dinit_cpc.S67 sw a0, GCR_CPC_BASE(r22_gcr_addr) // Write CPC_BASE address to GCR
Dcps.h225 #define GCR_CPC_BASE 0x0088 macro
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/
Ddemo_threadx_ram_interAptiv_3c2v4t.mbs17 *((unsigned int *) 0xbfbf8088) |= 0x1 // GCR_CPC_BASE.EN = 1
Dinit_cpc.mip67 sw a0, GCR_CPC_BASE(r22_gcr_addr) // Write CPC_BASE address to GCR
Dcps.h225 #define GCR_CPC_BASE 0x0088 macro