FIQEnableClear (reference) in projects: ThreadX-v6.4.1

Searched refs:FIQEnableClear (Results 1 – 2 of 2) sorted by relevance

/ThreadX-v6.4.1/ports/arm9/ac5/example_build/
D	tx_initialize_low_level.s	`57 FIQEnableClear EQU 0x0a00010C ; FIQ Enable Clear Register define`
/ThreadX-v6.4.1/ports/arm11/ac5/example_build/
D	tx_initialize_low_level.s	`57 FIQEnableClear EQU 0x0a00010C ; FIQ Enable Clear Register define`