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Searched refs:CPS_CORE_OTHER_CONTROL_BLOCK (Results 1 – 4 of 4) sorted by relevance

/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/
Drelease_mp.S70 sw a0, (CPS_CORE_OTHER_CONTROL_BLOCK | CPC_CMDO_REG)(r30_cpc_addr)
Dcps.h827 #define CPS_CORE_OTHER_CONTROL_BLOCK 0x4000 macro
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/
Dcps.h827 #define CPS_CORE_OTHER_CONTROL_BLOCK 0x4000 macro
Drelease_mp.mip70 sw a0, (CPS_CORE_OTHER_CONTROL_BLOCK | CPC_CMDO_REG)(r30_cpc_addr)