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Searched refs:C66XX_BOOTCFG_DDR3PLLCTL0_RG_OFFSET (Results 1 – 1 of 1) sorted by relevance

/ThreadX-v6.4.1/ports/c667x/ccs/example_build/include/
DC66XX_DEF.hxx1028 #define C66XX_BOOTCFG_DDR3PLLCTL0_RG_OFFSET 0x330 macro
1042 …BOOTCFG_DDR3PLLCTL0_RG_ADDR (C66XX_BOOTCFG_RG_AREA_SADDR + C66XX_BOOTCFG_DDR3PLLCTL0_RG_OFFSET)