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Searched refs:mmu_tbl2 (Results 1 – 2 of 2) sorted by relevance

/ThreadX-v6.3.0/ports_smp/cortex_a5x_smp/green/example_build/sample_threadx/
Dtx_zynqmp_low_level.c145 static uint64_t mmu_tbl2[0x800]; variable
183 sect = (uint64_t) mmu_tbl2; in mmu_tbl_init()
235 mmu_tbl2[i] = sect + MMU_MEMORY; in mmu_tbl_init()
239 mmu_tbl2[i] = sect + MMU_RESERVED; in mmu_tbl_init()
244 mmu_tbl2[i] = sect + MMU_DEVICE; in mmu_tbl_init()
249 mmu_tbl2[i] = sect + MMU_DEVICE; in mmu_tbl_init()
254 mmu_tbl2[i] = sect + MMU_DEVICE; in mmu_tbl_init()
259 mmu_tbl2[i] = sect + MMU_RESERVED; in mmu_tbl_init()
264 mmu_tbl2[i] = sect + MMU_DEVICE; in mmu_tbl_init()
269 mmu_tbl2[i] = sect + MMU_MEMORY; in mmu_tbl_init()
/ThreadX-v6.3.0/ports_smp/cortex_a5x_smp/green/example_build/tgt/
Dstandalone_ram.ld47 .mmu_tbl2 ALIGN(4096) : > .