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/ThreadX-v6.3.0/ports_smp/cortex_a9_smp/ac5/example_build/sample_threadx/
DMP_GlobalTimer.s14 ; Typical set of calls to enable Timer:
23 ; Initializes the Global Timer, but does NOT set the enable bit
32 ; Bit 0 - Timer enable
33 ; Bit 1 - Comp enable
34 ; Bit 2 - IRQ enable
35 ; Bit 3 - Auto-increment enable
39 BIC r3, r3, #0x01 ; Clear enable bit
43 CMP r0, #0 ; Check whether to enable auto-reload
63 ; Writes the comparator registers, and enable the comparator bit in the control register
72 BIC r3, r3, #0x02 ; Clear comparator enable bit
[all …]
DMP_GIC.s18 ; Typical calls to enable interrupt ID X:
36 ORR r1, r1, #0x01 ; Set bit 0, the enable bit
54 BIC r1, r1, #0x01 ; Set bit 0, the enable bit
DMP_PrivateTimer.s14 ; Typical set of calls to enable Timer:
42 CMP r1, #0 ; Check whether to enable auto-reload
62 ORR r1, r1, #0x01 ; Set enable bit
78 BIC r1, r1, #0x01 ; Clear enable bit
/ThreadX-v6.3.0/ports_smp/cortex_r8_smp/ac5/example_build/sample_threadx/
DMP_GlobalTimer.s14 ; Typical set of calls to enable Timer:
23 ; Initializes the Global Timer, but does NOT set the enable bit
32 ; Bit 0 - Timer enable
33 ; Bit 1 - Comp enable
34 ; Bit 2 - IRQ enable
35 ; Bit 3 - Auto-increment enable
39 BIC r3, r3, #0x01 ; Clear enable bit
43 CMP r0, #0 ; Check whether to enable auto-reload
63 ; Writes the comparator registers, and enable the comparator bit in the control register
72 BIC r3, r3, #0x02 ; Clear comparator enable bit
[all …]
DMP_GIC.S18 ; Typical calls to enable interrupt ID X:
36 ORR r1, r1, #0x01 ; Set bit 0, the enable bit
54 BIC r1, r1, #0x01 ; Set bit 0, the enable bit
DMP_PrivateTimer.s14 ; Typical set of calls to enable Timer:
42 CMP r1, #0 ; Check whether to enable auto-reload
62 ORR r1, r1, #0x01 ; Set enable bit
78 BIC r1, r1, #0x01 ; Clear enable bit
/ThreadX-v6.3.0/ports_smp/cortex_a5_smp/ac5/example_build/sample_threadx/
DMP_GlobalTimer.s14 ; Typical set of calls to enable Timer:
23 ; Initializes the Global Timer, but does NOT set the enable bit
32 ; Bit 0 - Timer enable
33 ; Bit 1 - Comp enable
34 ; Bit 2 - IRQ enable
35 ; Bit 3 - Auto-increment enable
39 BIC r3, r3, #0x01 ; Clear enable bit
43 CMP r0, #0 ; Check whether to enable auto-reload
63 ; Writes the comparator registers, and enable the comparator bit in the control register
72 BIC r3, r3, #0x02 ; Clear comparator enable bit
[all …]
DMP_PrivateTimer.s14 ; Typical set of calls to enable Timer:
42 CMP r1, #0 ; Check whether to enable auto-reload
62 ORR r1, r1, #0x01 ; Set enable bit
78 BIC r1, r1, #0x01 ; Clear enable bit
/ThreadX-v6.3.0/ports_smp/mips32_interaptiv_smp/green/src/
Dtx_thread_schedule.mip156 Pickup the thread's register context, enable multithreading, and transfer control to
199 lw $15, 176($8) # Pickup FPU enable flag in TX_THREAD structure
216 li $10,0xDFFFFFFF # Mask for FPU enable bit
218 and $9, $9, $10 # Build SR with FPU enable bit masked
220 li $10, 0x20000000 # Build FPU enable bit
221 or $9, $9, $10 # Build SR with FPU enable
322 li $10,0xDFFFFFFF # Mask for FPU enable bit
324 and $9, $9, $10 # Build SR with FPU enable bit masked
326 li $10, 0x20000000 # Build FPU enable bit
327 or $9, $9, $10 # Build SR with FPU enable
/ThreadX-v6.3.0/ports/cortex_r4/iar/src/
Dtx_thread_schedule.s195 BEQ __tx_no_thread_to_enable ; If NULL, skip VFP enable
196 MOV r0, #1 ; Build enable value
197 …STR r0, [r1, #144] ; Set the VFP enable flag (tx_thread_vfp_enable field …
213 …STR r0, [r1, #144] ; Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_r5/iar/src/
Dtx_thread_schedule.s195 BEQ __tx_no_thread_to_enable ; If NULL, skip VFP enable
196 MOV r0, #1 ; Build enable value
197 …STR r0, [r1, #144] ; Set the VFP enable flag (tx_thread_vfp_enable field …
213 …STR r0, [r1, #144] ; Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_r5/ac5/src/
Dtx_thread_schedule.s206 BEQ __tx_no_thread_to_enable ; If NULL, skip VFP enable
207 MOV r0, #1 ; Build enable value
208 …STR r0, [r1, #144] ; Set the VFP enable flag (tx_thread_vfp_enable field …
226 …STR r0, [r1, #144] ; Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_a15/iar/src/
Dtx_thread_schedule.s212 BEQ __tx_no_thread_to_enable ; If NULL, skip VFP enable
213 MOV r0, #1 ; Build enable value
214 …STR r0, [r1, #144] ; Set the VFP enable flag (tx_thread_vfp_enable field in T…
234 …STR r0, [r1, #144] ; Clear the VFP enable flag (tx_thread_vfp_enable field in…
/ThreadX-v6.3.0/ports_smp/cortex_a7_smp/gnu/example_build/
DMP_GIC.S16 @ ; Typical calls to enable interrupt ID X:
/ThreadX-v6.3.0/ports/cortex_a9/iar/src/
Dtx_thread_schedule.s214 BEQ __tx_no_thread_to_enable ; If NULL, skip VFP enable
215 MOV r0, #1 ; Build enable value
216 …STR r0, [r1, #144] ; Set the VFP enable flag (tx_thread_vfp_enable field …
236 …STR r0, [r1, #144] ; Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_r4/ac5/src/
Dtx_thread_schedule.s207 BEQ __tx_no_thread_to_enable ; If NULL, skip VFP enable
208 MOV r0, #1 ; Build enable value
209 …STR r0, [r1, #144] ; Set the VFP enable flag (tx_thread_vfp_enable field …
227 …STR r0, [r1, #144] ; Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_r4/gnu/src/
Dtx_thread_schedule.S216 BEQ __tx_no_thread_to_enable @ If NULL, skip VFP enable
217 MOV r0, #1 @ Build enable value
218 …STR r0, [r1, #144] @ Set the VFP enable flag (tx_thread_vfp_enable field …
237 …STR r0, [r1, #144] @ Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_a8/ac5/src/
Dtx_thread_schedule.s209 BEQ __tx_no_thread_to_enable ; If NULL, skip VFP enable
210 MOV r0, #1 ; Build enable value
211 …STR r0, [r1, #144] ; Set the VFP enable flag (tx_thread_vfp_enable field …
229 …STR r0, [r1, #144] ; Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_a8/iar/src/
Dtx_thread_schedule.s213 BEQ __tx_no_thread_to_enable ; If NULL, skip VFP enable
214 MOV r0, #1 ; Build enable value
215 …STR r0, [r1, #144] ; Set the VFP enable flag (tx_thread_vfp_enable field …
235 …STR r0, [r1, #144] ; Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_a9/ac5/src/
Dtx_thread_schedule.s209 BEQ __tx_no_thread_to_enable ; If NULL, skip VFP enable
210 MOV r0, #1 ; Build enable value
211 …STR r0, [r1, #144] ; Set the VFP enable flag (tx_thread_vfp_enable field …
229 …STR r0, [r1, #144] ; Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_r5/ac6/src/
Dtx_thread_schedule.S223 BEQ __tx_no_thread_to_enable @ If NULL, skip VFP enable
224 MOV r0, #1 @ Build enable value
225 …STR r0, [r1, #144] @ Set the VFP enable flag (tx_thread_vfp_enable field …
244 …STR r0, [r1, #144] @ Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_r5/gnu/src/
Dtx_thread_schedule.S216 BEQ __tx_no_thread_to_enable @ If NULL, skip VFP enable
217 MOV r0, #1 @ Build enable value
218 …STR r0, [r1, #144] @ Set the VFP enable flag (tx_thread_vfp_enable field …
237 …STR r0, [r1, #144] @ Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_a7/ac5/src/
Dtx_thread_schedule.s209 BEQ __tx_no_thread_to_enable ; If NULL, skip VFP enable
210 MOV r0, #1 ; Build enable value
211 …STR r0, [r1, #144] ; Set the VFP enable flag (tx_thread_vfp_enable field …
229 …STR r0, [r1, #144] ; Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_a7/iar/src/
Dtx_thread_schedule.s213 BEQ __tx_no_thread_to_enable ; If NULL, skip VFP enable
214 MOV r0, #1 ; Build enable value
215 …STR r0, [r1, #144] ; Set the VFP enable flag (tx_thread_vfp_enable field …
235 …STR r0, [r1, #144] ; Clear the VFP enable flag (tx_thread_vfp_enable fiel…
/ThreadX-v6.3.0/ports/cortex_a5/iar/src/
Dtx_thread_schedule.s217 BEQ __tx_no_thread_to_enable ; If NULL, skip VFP enable
218 MOV r0, #1 ; Build enable value
219 …STR r0, [r1, #144] ; Set the VFP enable flag (tx_thread_vfp_enable field …
239 …STR r0, [r1, #144] ; Clear the VFP enable flag (tx_thread_vfp_enable fiel…

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