| /ThreadX-v6.3.0/utility/rtos_compatibility_layers/OSEK/ |
| D | os.h | 543 TickType cycle; member
550 TickType cycle; member
770 TickType cycle; member
920 StatusType SetAbsAlarm(AlarmType AlarmID, TickType start, TickType cycle);
921 StatusType SetRelAlarm(AlarmType AlarmID, TickType increment, TickType cycle);
|
| D | tx_osek.c | 4219 if (this_alarm->cycle != 0u) in IncrCounter()
4222 this_alarm->expiration_count += this_alarm->cycle; in IncrCounter()
4728 this_alarm->cycle = 0u; in CreateAlarm()
4755 this_alarm->cycle = Cycle; in CreateAlarm()
4890 StatusType SetAbsAlarm(AlarmType AlarmID, TickType start, TickType cycle) in SetAbsAlarm() argument
4899 service_SetAbsAlarm.cycle = cycle; in SetAbsAlarm()
4938 if (cycle != 0u) in SetAbsAlarm()
4940 if ((cycle < osek_alarm->min_cyc) || ( cycle > osek_alarm->max_allowed_value)) in SetAbsAlarm()
4952 osek_alarm->cycle = cycle; in SetAbsAlarm()
5013 StatusType SetRelAlarm(AlarmType AlarmID, TickType increment, TickType cycle) in SetRelAlarm() argument
[all …]
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| /ThreadX-v6.3.0/ports/cortex_m3/ghs/example_build/ |
| D | tx_initialize_low_level.arm | 94 /* Enable the cycle count register. */
99 STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m4/ghs/example_build/ |
| D | tx_initialize_low_level.arm | 94 /* Enable the cycle count register. */
99 STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports_arch/ARMv7-M/threadx/ghs/example_build/ |
| D | tx_initialize_low_level.arm | 94 /* Enable the cycle count register. */
99 STR r1, [r0] ; Enable the cycle count register
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| /ThreadX-v6.3.0/ports/cortex_m7/ghs/example_build/ |
| D | tx_initialize_low_level.arm | 94 /* Enable the cycle count register. */
99 STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m3/iar/example_build/ |
| D | tx_initialize_low_level.s | 105 STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m7/iar/example_build/ |
| D | tx_initialize_low_level.s | 105 STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m4/iar/example_build/ |
| D | tx_initialize_low_level.s | 105 STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports_module/cortex_m3/iar/example_build/ |
| D | tx_initialize_low_level.s | 115 STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m0/gnu/example_build/ |
| D | tx_initialize_low_level.S | 117 @ STR r1, [r0] @ Enable the cycle count register
|
| /ThreadX-v6.3.0/ports_module/cortex_m3/gnu/example_build/ |
| D | tx_initialize_low_level.S | 114 STR r1, [r0] @ Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m0/ac6/example_build/sample_threadx/ |
| D | tx_initialize_low_level.S | 101 @ STR r1, [r0] @ Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m0/iar/example_build/ |
| D | tx_initialize_low_level.s | 108 ; STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m3/ac6/example_build/sample_threadx/ |
| D | tx_initialize_low_level.S | 121 STR r1, [r0] @ Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m4/gnu/example_build/ |
| D | tx_initialize_low_level.S | 127 STR r1, [r0] @ Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m7/ac6/example_build/sample_threadx/ |
| D | tx_initialize_low_level.S | 121 STR r1, [r0] @ Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m4/ac6/example_build/sample_threadx/ |
| D | tx_initialize_low_level.S | 121 STR r1, [r0] @ Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m3/ac5/example_build/ |
| D | tx_initialize_low_level.s | 160 ; STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m3/keil/example_build/ |
| D | tx_initialize_low_level.s | 159 ; STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m4/keil/example_build/ |
| D | tx_initialize_low_level.s | 179 ; STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m7/ac5/example_build/ |
| D | tx_initialize_low_level.s | 169 ; STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports/cortex_m4/ac5/example_build/ |
| D | tx_initialize_low_level.s | 163 ; STR r1, [r0] ; Enable the cycle count register
|
| /ThreadX-v6.3.0/ports_module/cortex_m3/ac5/example_build/ |
| D | tx_initialize_low_level.S | 183 ; STR r1, [r0] ; Enable the cycle count register
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| /ThreadX-v6.3.0/ports/cortex_m0/ac5/example_build/ |
| D | tx_initialize_low_level.s | 159 ; STR r1, [r0] ; Enable the cycle count register
|
