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/ThreadX-v6.3.0/ports/cortex_m55/ac6/example_build/demo_secure_zone/RTE/Device/SSE-300-MPS3/
Dfvp_sse300_mps3_s.sct34 * the S_CODE_SIZE value. We also substract from the available space the
53 * size of the SRAM available.
75 * size of the SRAM available.
/ThreadX-v6.3.0/ports/cortex_m55/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/SSE-300-MPS3/
Dfvp_sse300_mps3_s.sct34 * the S_CODE_SIZE value. We also substract from the available space the
53 * size of the SRAM available.
75 * size of the SRAM available.
/ThreadX-v6.3.0/ports/rxv1/ccrx/src/
Dtx_initialize_low_level.src48 ;/* available RAM memory address for tx_application_define. */
83 ; /* Save the first available memory address. */
/ThreadX-v6.3.0/ports/rxv2/ccrx/src/
Dtx_initialize_low_level.src48 ;/* available RAM memory address for tx_application_define. */
83 ; /* Save the first available memory address. */
/ThreadX-v6.3.0/ports/rxv3/ccrx/src/
Dtx_initialize_low_level.src48 ;/* available RAM memory address for tx_application_define. */
83 ; /* Save the first available memory address. */
/ThreadX-v6.3.0/ports/cortex_a8/ghs/example_build/
Dtx_initialize_low_level.arm61 /* available RAM memory address for tx_application_define. */
101 /* Pickup the first available memory address. */
108 MOV r1, r0 # Get first available memory
142 /* Save the first available memory address. */
212 interrupt, and all C scratch registers are available for use. */
269 interrupt, and all C scratch registers are available for use. */
/ThreadX-v6.3.0/ports/cortex_a9/ghs/example_build/
Dtx_initialize_low_level.arm61 /* available RAM memory address for tx_application_define. */
101 /* Pickup the first available memory address. */
108 MOV r1, r0 # Get first available memory
142 /* Save the first available memory address. */
212 interrupt, and all C scratch registers are available for use. */
269 interrupt, and all C scratch registers are available for use. */
/ThreadX-v6.3.0/ports/cortex_r5/ghs/example_build/
Dtx_initialize_low_level.arm61 /* available RAM memory address for tx_application_define. */
101 /* Pickup the first available memory address. */
108 MOV r1, r0 # Get first available memory
142 /* Save the first available memory address. */
212 interrupt, and all C scratch registers are available for use. */
269 interrupt, and all C scratch registers are available for use. */
/ThreadX-v6.3.0/ports/cortex_r7/ghs/example_build/
Dtx_initialize_low_level.arm61 /* available RAM memory address for tx_application_define. */
101 /* Pickup the first available memory address. */
108 MOV r1, r0 # Get first available memory
142 /* Save the first available memory address. */
212 interrupt, and all C scratch registers are available for use. */
269 interrupt, and all C scratch registers are available for use. */
/ThreadX-v6.3.0/ports/cortex_a7/ghs/example_build/
Dtx_initialize_low_level.arm61 /* available RAM memory address for tx_application_define. */
101 /* Pickup the first available memory address. */
108 MOV r1, r0 # Get first available memory
142 /* Save the first available memory address. */
212 interrupt, and all C scratch registers are available for use. */
269 interrupt, and all C scratch registers are available for use. */
/ThreadX-v6.3.0/ports/cortex_r4/ghs/example_build/
Dtx_initialize_low_level.arm61 /* available RAM memory address for tx_application_define. */
101 /* Pickup the first available memory address. */
108 MOV r1, r0 # Get first available memory
142 /* Save the first available memory address. */
212 interrupt, and all C scratch registers are available for use. */
269 interrupt, and all C scratch registers are available for use. */
/ThreadX-v6.3.0/ports/cortex_a5/ghs/example_build/
Dtx_initialize_low_level.arm61 /* available RAM memory address for tx_application_define. */
101 /* Pickup the first available memory address. */
108 MOV r1, r0 # Get first available memory
142 /* Save the first available memory address. */
212 interrupt, and all C scratch registers are available for use. */
269 interrupt, and all C scratch registers are available for use. */
/ThreadX-v6.3.0/ports_smp/cortex_a7_smp/gnu/src/
Dtx_thread_smp_protect.S138 BNE _start_waiting @ No, protection not available
188 BNE _start_waiting @ No, protection not available
290 BNE _did_not_get_lock @ No, protection not available
/ThreadX-v6.3.0/ports_smp/cortex_a9_smp/gnu/src/
Dtx_thread_smp_protect.S138 BNE _start_waiting @ No, protection not available
188 BNE _start_waiting @ No, protection not available
290 BNE _did_not_get_lock @ No, protection not available
/ThreadX-v6.3.0/ports_smp/cortex_a5_smp/gnu/src/
Dtx_thread_smp_protect.S136 BNE _start_waiting @ No, protection not available
186 BNE _start_waiting @ No, protection not available
288 BNE _did_not_get_lock @ No, protection not available
/ThreadX-v6.3.0/test/smp/regression/
Dthreadx_block_memory_information_test.c220 ULONG available; in thread_0_entry() local
358 …status += tx_block_pool_info_get(&block_pool_0, &name, &available, &total_blocks, &first_suspende… in thread_0_entry()
361 …if ((status) || (available != block_pool_0.tx_block_pool_available) || (total_blocks != block_pool… in thread_0_entry()
/ThreadX-v6.3.0/test/tx/regression/
Dthreadx_block_memory_information_test.c220 ULONG available; in thread_0_entry() local
358 …status += tx_block_pool_info_get(&block_pool_0, &name, &available, &total_blocks, &first_suspende… in thread_0_entry()
361 …if ((status) || (available != block_pool_0.tx_block_pool_available) || (total_blocks != block_pool… in thread_0_entry()
/ThreadX-v6.3.0/ports_smp/cortex_a5x_smp/green/src/
Dtx_initialize_low_level.a6467 /* available RAM memory address for tx_application_define. */
110 /* Save the first available memory address. */
/ThreadX-v6.3.0/ports_smp/cortex_a7_smp/ac5/src/
Dtx_thread_smp_protect.s134 BNE _start_waiting ; No, protection not available
184 BNE _start_waiting ; No, protection not available
286 BNE _did_not_get_lock ; No, protection not available
/ThreadX-v6.3.0/ports_smp/cortex_a9_smp/ac5/src/
Dtx_thread_smp_protect.s136 BNE _start_waiting ; No, protection not available
186 BNE _start_waiting ; No, protection not available
288 BNE _did_not_get_lock ; No, protection not available
/ThreadX-v6.3.0/ports_smp/cortex_a5_smp/ac5/src/
Dtx_thread_smp_protect.s134 BNE _start_waiting ; No, protection not available
184 BNE _start_waiting ; No, protection not available
286 BNE _did_not_get_lock ; No, protection not available
/ThreadX-v6.3.0/ports/cortex_a8/ac6/
Dreadme_threadx.txt42 In addition, _tx_initialize_low_level defines the first available address
130 @ interrupt, and all C scratch registers are available for use. Note
158 @ interrupt, and all C scratch registers are available for use. Note
173 available, namely _tx_thread_irq_nesting_start and _tx_thread_irq_nesting_end.
241 @ interrupt, and all C scratch registers are available for use. */
254 available, namely _tx_thread_fiq_nesting_start and _tx_thread_fiq_nesting_end.
280 @ interrupt, and all C scratch registers are available for use. */
/ThreadX-v6.3.0/ports/cortex_a9/ac6/
Dreadme_threadx.txt45 In addition, _tx_initialize_low_level defines the first available address
133 @ interrupt, and all C scratch registers are available for use. Note
161 @ interrupt, and all C scratch registers are available for use. Note
176 available, namely _tx_thread_irq_nesting_start and _tx_thread_irq_nesting_end.
244 @ interrupt, and all C scratch registers are available for use. */
257 available, namely _tx_thread_fiq_nesting_start and _tx_thread_fiq_nesting_end.
283 @ interrupt, and all C scratch registers are available for use. */
/ThreadX-v6.3.0/ports/cortex_r5/ac6/
Dreadme_threadx.txt45 In addition, _tx_initialize_low_level defines the first available address
133 @ interrupt, and all C scratch registers are available for use. Note
161 @ interrupt, and all C scratch registers are available for use. Note
176 available, namely _tx_thread_irq_nesting_start and _tx_thread_irq_nesting_end.
244 @ interrupt, and all C scratch registers are available for use. */
257 available, namely _tx_thread_fiq_nesting_start and _tx_thread_fiq_nesting_end.
283 @ interrupt, and all C scratch registers are available for use. */
/ThreadX-v6.3.0/ports/cortex_a15/ac6/
Dreadme_threadx.txt45 In addition, _tx_initialize_low_level defines the first available address
133 @ interrupt, and all C scratch registers are available for use. Note
161 @ interrupt, and all C scratch registers are available for use. Note
176 available, namely _tx_thread_irq_nesting_start and _tx_thread_irq_nesting_end.
244 @ interrupt, and all C scratch registers are available for use. */
257 available, namely _tx_thread_fiq_nesting_start and _tx_thread_fiq_nesting_end.
283 @ interrupt, and all C scratch registers are available for use. */

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