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Searched refs:_tx_misra_control_set (Results 1 – 25 of 78) sorted by relevance

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/ThreadX-v6.3.0/ports_module/cortex_m0+/ac6/inc/
Dtx_port.h227 void _tx_misra_control_set(ULONG value);
270_tx_misra_control_set(_tx_vfp_state); \
324_tx_misra_control_set(_tx_vfp_state); \
341_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports_module/cortex_m0+/gnu/inc/
Dtx_port.h241 void _tx_misra_control_set(ULONG value);
284_tx_misra_control_set(_tx_vfp_state); \
338_tx_misra_control_set(_tx_vfp_state); \
355_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports_module/cortex_m0+/iar/inc/
Dtx_port.h297 void _tx_misra_control_set(ULONG value);
340_tx_misra_control_set(_tx_vfp_state); \
394_tx_misra_control_set(_tx_vfp_state); \
411_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports_module/cortex_m23/ac6/inc/
Dtx_port.h340 void _tx_misra_control_set(ULONG value);
382_tx_misra_control_set(_tx_vfp_state); \
436_tx_misra_control_set(_tx_vfp_state); \
453_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m85/ac6/inc/
Dtx_port.h351 void _tx_misra_control_set(ULONG value);
396_tx_misra_control_set(_tx_vfp_state); \
447_tx_misra_control_set(_tx_vfp_state); \
464_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m85/gnu/inc/
Dtx_port.h351 void _tx_misra_control_set(ULONG value);
396_tx_misra_control_set(_tx_vfp_state); \
447_tx_misra_control_set(_tx_vfp_state); \
464_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m85/iar/inc/
Dtx_port.h351 void _tx_misra_control_set(ULONG value);
396_tx_misra_control_set(_tx_vfp_state); \
447_tx_misra_control_set(_tx_vfp_state); \
464_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m55/iar/inc/
Dtx_port.h351 void _tx_misra_control_set(ULONG value);
396_tx_misra_control_set(_tx_vfp_state); \
447_tx_misra_control_set(_tx_vfp_state); \
464_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m33/ac6/inc/
Dtx_port.h351 void _tx_misra_control_set(ULONG value);
396_tx_misra_control_set(_tx_vfp_state); \
447_tx_misra_control_set(_tx_vfp_state); \
464_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m33/gnu/inc/
Dtx_port.h351 void _tx_misra_control_set(ULONG value);
396_tx_misra_control_set(_tx_vfp_state); \
447_tx_misra_control_set(_tx_vfp_state); \
464_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m33/iar/inc/
Dtx_port.h351 void _tx_misra_control_set(ULONG value);
396_tx_misra_control_set(_tx_vfp_state); \
447_tx_misra_control_set(_tx_vfp_state); \
464_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m55/ac6/inc/
Dtx_port.h351 void _tx_misra_control_set(ULONG value);
396_tx_misra_control_set(_tx_vfp_state); \
447_tx_misra_control_set(_tx_vfp_state); \
464_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m55/gnu/inc/
Dtx_port.h351 void _tx_misra_control_set(ULONG value);
396_tx_misra_control_set(_tx_vfp_state); \
447_tx_misra_control_set(_tx_vfp_state); \
464_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports_arch/ARMv8-M/threadx/inc/
Dtx_port.h351 void _tx_misra_control_set(ULONG value);
396_tx_misra_control_set(_tx_vfp_state); \
447_tx_misra_control_set(_tx_vfp_state); \
464_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m3/ac5/inc/
Dtx_port.h302 void _tx_misra_control_set(ULONG value);
368_tx_misra_control_set(_tx_vfp_state); \
420_tx_misra_control_set(_tx_vfp_state); \
437_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m3/ac6/inc/
Dtx_port.h302 void _tx_misra_control_set(ULONG value);
368_tx_misra_control_set(_tx_vfp_state); \
420_tx_misra_control_set(_tx_vfp_state); \
437_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m3/gnu/inc/
Dtx_port.h302 void _tx_misra_control_set(ULONG value);
368_tx_misra_control_set(_tx_vfp_state); \
420_tx_misra_control_set(_tx_vfp_state); \
437_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m3/iar/inc/
Dtx_port.h302 void _tx_misra_control_set(ULONG value);
368_tx_misra_control_set(_tx_vfp_state); \
420_tx_misra_control_set(_tx_vfp_state); \
437_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m3/keil/inc/
Dtx_port.h302 void _tx_misra_control_set(ULONG value);
368_tx_misra_control_set(_tx_vfp_state); \
420_tx_misra_control_set(_tx_vfp_state); \
437_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m7/gnu/inc/
Dtx_port.h302 void _tx_misra_control_set(ULONG value);
368_tx_misra_control_set(_tx_vfp_state); \
420_tx_misra_control_set(_tx_vfp_state); \
437_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m7/iar/inc/
Dtx_port.h302 void _tx_misra_control_set(ULONG value);
368_tx_misra_control_set(_tx_vfp_state); \
420_tx_misra_control_set(_tx_vfp_state); \
437_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m4/gnu/inc/
Dtx_port.h302 void _tx_misra_control_set(ULONG value);
368_tx_misra_control_set(_tx_vfp_state); \
420_tx_misra_control_set(_tx_vfp_state); \
437_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m4/iar/inc/
Dtx_port.h302 void _tx_misra_control_set(ULONG value);
368_tx_misra_control_set(_tx_vfp_state); \
420_tx_misra_control_set(_tx_vfp_state); \
437_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m4/keil/inc/
Dtx_port.h302 void _tx_misra_control_set(ULONG value);
368_tx_misra_control_set(_tx_vfp_state); \
420_tx_misra_control_set(_tx_vfp_state); \
437_tx_misra_control_set(_tx_vfp_state); \
/ThreadX-v6.3.0/ports/cortex_m7/ac5/inc/
Dtx_port.h302 void _tx_misra_control_set(ULONG value);
368_tx_misra_control_set(_tx_vfp_state); \
420_tx_misra_control_set(_tx_vfp_state); \
437_tx_misra_control_set(_tx_vfp_state); \

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