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Searched refs:SVC_MODE (Results 1 – 25 of 227) sorted by relevance

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/ThreadX-v6.3.0/ports/cortex_a9/gnu/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
Dtx_thread_fiq_context_restore.S26 SVC_MODE = 0xD3 // SVC mode define
171 MOV r2, #SVC_MODE // Build SVC mode CPSR
179 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r3, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports_arch/ARMv7-A/threadx/common/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
Dtx_thread_fiq_context_restore.S26 SVC_MODE = 0xD3 // SVC mode define
171 MOV r2, #SVC_MODE // Build SVC mode CPSR
179 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r3, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a8/ac6/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
Dtx_thread_fiq_context_restore.S26 SVC_MODE = 0xD3 // SVC mode define
171 MOV r2, #SVC_MODE // Build SVC mode CPSR
179 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r3, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a8/gnu/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
Dtx_thread_fiq_context_restore.S26 SVC_MODE = 0xD3 // SVC mode define
171 MOV r2, #SVC_MODE // Build SVC mode CPSR
179 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r3, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a9/ac6/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
Dtx_thread_fiq_context_restore.S26 SVC_MODE = 0xD3 // SVC mode define
171 MOV r2, #SVC_MODE // Build SVC mode CPSR
179 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r3, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a12/gnu/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a15/gnu/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a7/ac6/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a17/gnu/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a12/ac6/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a7/gnu/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a5/ac6/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a5/gnu/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a15/ac6/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports/cortex_a17/ac6/src/
Dtx_thread_context_restore.S29 SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode define
32 SVC_MODE = 0x93 // Disable IRQ, SVC mode define
172 MOV r2, #SVC_MODE // Build SVC mode CPSR
180 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r0, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports_module/cortex_r4/ac6/module_manager/src/
Dtx_thread_fiq_context_restore.S35 #define SVC_MODE 0x13 // SVC mode macro
191 … CPS #SVC_MODE // Switch to SVC mode to save context on thread stack
199 …CPS #SVC_MODE // Switch to SVC mode to save remaining context on thr…
257 CPS #SVC_MODE // Switch to SVC mode
/ThreadX-v6.3.0/ports/cortex_r4/ac6/src/
Dtx_thread_context_restore.S37 #define SVC_MODE 0x13 // SVC mode macro
186 … CPS #SVC_MODE // Switch to SVC mode to save context on thread stack
194 …CPS #SVC_MODE // Switch to SVC mode to save remaining context on thr…
250 CPS #SVC_MODE // Switch to SVC mode
Dtx_thread_fiq_context_restore.S35 #define SVC_MODE 0x13 // SVC mode macro
191 … CPS #SVC_MODE // Switch to SVC mode to save context on thread stack
199 …CPS #SVC_MODE // Switch to SVC mode to save remaining context on thr…
257 CPS #SVC_MODE // Switch to SVC mode
/ThreadX-v6.3.0/ports_module/cortex_a7/gnu/module_manager/src/
Dtx_thread_fiq_context_restore.s29 SVC_MODE = 0xD3 // SVC mode define
171 MOV r2, #SVC_MODE // Build SVC mode CPSR
179 MOV r5, #SVC_MODE // Build SVC mode CPSR
226 MOV r3, #SVC_MODE // Build SVC mode CPSR
/ThreadX-v6.3.0/ports_smp/cortex_r8_smp/ac5/src/
Dtx_thread_context_restore.s26 SVC_MODE EQU 0xD3 // SVC mode define
30 SVC_MODE EQU 0x93 // SVC mode define
187 MOV r2, #SVC_MODE // Build SVC mode CPSR
195 MOV r5, #SVC_MODE // Build SVC mode CPSR
270 MOV r3, #SVC_MODE // Build SVC mode with interrupts disabled

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