| /ThreadX-v6.3.0/ports/cortex_m55/ac6/example_build/demo_secure_zone/RTE/Device/SSE-300-MPS3/ |
| D | region_limits.h | 42 #define HEAP_SIZE (0x00000400) /* 1 KiB */ macro
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| /ThreadX-v6.3.0/ports/cortex_m55/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/SSE-300-MPS3/ |
| D | region_limits.h | 42 #define HEAP_SIZE (0x00000400) /* 1 KiB */ macro
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| /ThreadX-v6.3.0/ports_module/cortex_m7/ac5/example_build/ |
| D | tx_initialize_low_level.S | 43 HEAP_SIZE EQU 0x00000000 define 54 SPACE HEAP_SIZE 213 LDR r2, =(HeapMem + HEAP_SIZE)
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| /ThreadX-v6.3.0/ports_module/cortex_m4/ac5/example_build/ |
| D | tx_initialize_low_level.S | 43 HEAP_SIZE EQU 0x00000000 define 54 SPACE HEAP_SIZE 213 LDR r2, =(HeapMem + HEAP_SIZE)
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| /ThreadX-v6.3.0/ports_arch/ARMv7-M/threadx/ac5/example_build/ |
| D | tx_initialize_low_level.s | 45 HEAP_SIZE EQU 0x00000000 define 56 SPACE HEAP_SIZE 206 LDR r2, =(HeapMem + HEAP_SIZE)
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| /ThreadX-v6.3.0/ports/cortex_m3/ac5/example_build/ |
| D | tx_initialize_low_level.s | 42 HEAP_SIZE EQU 0x00000000 define 53 SPACE HEAP_SIZE 203 LDR R2, =(HeapMem + HEAP_SIZE)
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| /ThreadX-v6.3.0/ports/cortex_m3/keil/example_build/ |
| D | tx_initialize_low_level.s | 42 HEAP_SIZE EQU 0x00000000 define 53 SPACE HEAP_SIZE 202 LDR R2, =(HeapMem + HEAP_SIZE)
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| /ThreadX-v6.3.0/ports_arch/ARMv7-A/threadx/ports/ac5/example_build/ |
| D | tx_initialize_low_level.s | 36 HEAP_SIZE EQU 4096 // Heap size define 149 LDR r2, =HEAP_SIZE // Pickup the heap size 204 LDR r2, =HEAP_SIZE // Pickup the heap size
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| /ThreadX-v6.3.0/ports/cortex_m4/keil/example_build/ |
| D | tx_initialize_low_level.s | 54 HEAP_SIZE EQU 0x00000000 define 65 SPACE HEAP_SIZE 222 LDR r2, =(HeapMem + HEAP_SIZE)
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| /ThreadX-v6.3.0/ports/cortex_m7/ac5/example_build/ |
| D | tx_initialize_low_level.s | 44 HEAP_SIZE EQU 0x00000000 define 55 SPACE HEAP_SIZE 212 LDR r2, =(HeapMem + HEAP_SIZE)
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| /ThreadX-v6.3.0/ports/cortex_m4/ac5/example_build/ |
| D | tx_initialize_low_level.s | 39 HEAP_SIZE EQU 0x00000000 define 50 SPACE HEAP_SIZE 206 LDR r2, =(HeapMem + HEAP_SIZE)
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| /ThreadX-v6.3.0/ports_module/cortex_m3/ac5/example_build/ |
| D | tx_initialize_low_level.S | 56 HEAP_SIZE EQU 0x00000000 define 67 SPACE HEAP_SIZE 226 LDR r2, =(HeapMem + HEAP_SIZE)
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| /ThreadX-v6.3.0/ports/cortex_m0/ac5/example_build/ |
| D | tx_initialize_low_level.s | 42 HEAP_SIZE EQU 0x00000000 define 53 SPACE HEAP_SIZE 219 LDR R2, =(HeapMem + HEAP_SIZE)
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| /ThreadX-v6.3.0/ports/cortex_m0/keil/example_build/ |
| D | tx_initialize_low_level.s | 42 HEAP_SIZE EQU 0x00000000 define 53 SPACE HEAP_SIZE 219 LDR R2, =(HeapMem + HEAP_SIZE)
|
| /ThreadX-v6.3.0/ports/risc-v32/iar/example_build/ |
| D | sample_threadx.icf | 19 define block HEAP with alignment = 16, size = HEAP_SIZE { };
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| /ThreadX-v6.3.0/ports_module/cortex_m23/ac6/example_build/ |
| D | tx_initialize_low_level.S | 30 HEAP_SIZE = 0x00000000 define
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| /ThreadX-v6.3.0/ports_module/cortex_m23/gnu/module_manager/src/ |
| D | tx_initialize_low_level.S | 30 HEAP_SIZE = 0x00000000 define
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| /ThreadX-v6.3.0/ports/cortex_r4/ac5/example_build/ |
| D | tx_initialize_low_level.s | 48 HEAP_SIZE EQU 4096 ; Heap size define 146 LDR r2, =HEAP_SIZE ; Pickup the heap size 211 LDR r2, =HEAP_SIZE ; Pickup the heap size
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| /ThreadX-v6.3.0/ports/cortex_r5/ac5/example_build/ |
| D | tx_initialize_low_level.s | 48 HEAP_SIZE EQU 4096 ; Heap size define 146 LDR r2, =HEAP_SIZE ; Pickup the heap size 211 LDR r2, =HEAP_SIZE ; Pickup the heap size
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| /ThreadX-v6.3.0/ports/cortex_a8/ac5/example_build/ |
| D | tx_initialize_low_level.s | 48 HEAP_SIZE EQU 4096 ; Heap size define 146 LDR r2, =HEAP_SIZE ; Pickup the heap size 211 LDR r2, =HEAP_SIZE ; Pickup the heap size
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| /ThreadX-v6.3.0/ports/cortex_a5/ac5/example_build/ |
| D | tx_initialize_low_level.s | 48 HEAP_SIZE EQU 4096 ; Heap size define 146 LDR r2, =HEAP_SIZE ; Pickup the heap size 211 LDR r2, =HEAP_SIZE ; Pickup the heap size
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| /ThreadX-v6.3.0/ports/cortex_m23/ac6/example_build/ |
| D | tx_initialize_low_level.S | 33 HEAP_SIZE = 0x00000000 define
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| /ThreadX-v6.3.0/ports/cortex_m23/gnu/src/ |
| D | tx_initialize_low_level.S | 33 HEAP_SIZE = 0x00000000 define
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| /ThreadX-v6.3.0/ports/cortex_a9/ac5/example_build/ |
| D | tx_initialize_low_level.s | 48 HEAP_SIZE EQU 4096 ; Heap size define 166 LDR r2, =HEAP_SIZE ; Pickup the heap size 231 LDR r2, =HEAP_SIZE ; Pickup the heap size
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| /ThreadX-v6.3.0/ports/cortex_a7/ac5/example_build/ |
| D | tx_initialize_low_level.s | 48 HEAP_SIZE EQU 4096 ; Heap size define 166 LDR r2, =HEAP_SIZE ; Pickup the heap size 231 LDR r2, =HEAP_SIZE ; Pickup the heap size
|