Home
last modified time | relevance | path

Searched refs:GICD_ICPENDR (Results 1 – 25 of 70) sorted by relevance

123

/ThreadX-v6.3.0/ports_smp/cortex_a53_smp/ac6/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_smp/cortex_a78_smp/gnu/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_smp/cortex_a35_smp/ac6/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_smp/cortex_a35_smp/gnu/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_module/cortex_a35_smp/ac6/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_module/cortex_a35_smp/ac6/example_build/sample_threadx_module_manager/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_module/cortex_a35_smp/gnu/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports/cortex_a75/gnu/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports/cortex_a76/ac6/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports/cortex_a76/gnu/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_smp/cortex_a53_smp/gnu/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports/cortex_a76ae/gnu/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports/cortex_a77/ac6/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports/cortex_a77/gnu/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports/cortex_a76ae/ac6/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_smp/cortex_a55_smp/ac6/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_smp/cortex_a55_smp/gnu/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_smp/cortex_a57_smp/ac6/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_smp/cortex_a57_smp/gnu/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_smp/cortex_a34_smp/ac6/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_smp/cortex_a78_smp/ac6/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_smp/cortex_a34_smp/gnu/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports_smp/cortex_a72_smp/ac6/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()
/ThreadX-v6.3.0/ports/cortex_a65/ac6/example_build/sample_threadx/
DGICv3_gicd.c46 volatile uint32_t GICD_ICPENDR[32]; // +0x0280 member
249 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in ClearSPIPending()
252 gicd.GICD_ICPENDR[bank] = 1 << id; in ClearSPIPending()
262 bank = (id >> 5) & RANGE_LIMIT(gicd.GICD_ICPENDR); in GetSPIPending()
265 return (gicd.GICD_ICPENDR[bank] >> id) & 1; in GetSPIPending()

123